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Eles, Petru Ion, Professor
Alternative names
Publications (10 of 255) Show all publications
Pan, Y., Mahfouzi, R., Samii, S., Eles, P. I. & Peng, Z. (2024). Multi-Traffic Resource Optimization for Real-Time Applications with 5G Configured Grant Scheduling. ACM Transactions on Embedded Computing Systems, 23(4), Article ID 63.
Open this publication in new window or tab >>Multi-Traffic Resource Optimization for Real-Time Applications with 5G Configured Grant Scheduling
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2024 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 23, no 4, article id 63Article in journal (Refereed) Published
Abstract [en]

The fifth-generation (5G) technology standard in telecommunications is expected to support ultra-reliable low latency communication to enable real-time applications such as industrial automation and control. 5G configured grant (CG) scheduling features a pre-allocated periodicity-based scheduling approach, which reduces control signaling time and guarantees service quality. Although this enables 5G to support hard real-time periodic traffics, synthesizing the schedule efficiently and achieving high resource efficiency, while serving multiple communications, are still an open problem. In this work, we study the trade-off between scheduling flexibility and control overhead when performing CG scheduling. To address the CG scheduling problem, we first formulate it using satisfiability modulo theories (SMT) so that an SMT solver can be used to generate optimal solutions. To enhance scalability, we propose two heuristic approaches. The first one as the baseline, Co1, follows the basic idea of the 5G CG scheduling scheme that minimizes the control overhead. The second one, CoU, enables increased scheduling flexibility while considering the involved control overhead. The effectiveness and scalability of the proposed techniques and the superiority of CoU compared to Co1 have been evaluated using a large number of generated benchmarks as well as a realistic case study for industrial automation.

Place, publisher, year, edition, pages
ASSOC COMPUTING MACHINERY, 2024
Keywords
5G; URLLC; deterministic periodic traffic; configured grant scheduling; satisfiability modulo theories; resource optimization
National Category
Embedded Systems
Identifiers
urn:nbn:se:liu:diva-207759 (URN)10.1145/3664621 (DOI)001288115200010 ()
Note

Funding Agencies|ELLIIT (Excellence Center at Linkoping-Lund in Information Technology); SSF (Swedish Foundation for Strategic Research) [FUS21-0033]

Available from: 2024-09-20 Created: 2024-09-20 Last updated: 2024-10-10
Niknafs, M., Eles, P. I. & Peng, Z. (2023). Runtime Resource Management with Multiple-Step-Ahead Workload Prediction. ACM Transactions on Embedded Computing Systems, 22(4), Article ID 71.
Open this publication in new window or tab >>Runtime Resource Management with Multiple-Step-Ahead Workload Prediction
2023 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 22, no 4, article id 71Article in journal (Refereed) Published
Abstract [en]

Modern embedded platforms need sophisticated resource managers to utilize their heterogeneous computational resources efficiently. Furthermore, such platforms are subject to fluctuating workloads that are unforeseeable at design time. Predicting the incoming workload could enhance the efficiency of resource management in this situation. But is that the case? And, if so, how substantial is this improvement? Does multiple-step-ahead prediction of the workload contribute to this improvement? How precise must the prediction be to improve decisions rather than cause harm? By proposing a prediction-based resource manager that aims at meeting task deadlines while minimizing energy usage, and by conducting extensive tests, we attempt to provide answers to the aforementioned questions.

Place, publisher, year, edition, pages
ASSOC COMPUTING MACHINERY, 2023
Keywords
Heterogeneous architecture, multiple-step-ahead prediction, resource management
National Category
Embedded Systems
Identifiers
urn:nbn:se:liu:diva-196542 (URN)10.1145/3605213 (DOI)001053965300012 ()2-s2.0-85170645262 (Scopus ID)
Note

Funding: Swedish Foundation for Strategic Research (SSF) [FUS21-0033]

Available from: 2023-08-10 Created: 2023-08-10 Last updated: 2025-02-20
Horga, A., Rezine, A., Chattopadhyay, S., Eles, P. I. & Peng, Z. (2022). Symbolic identification of shared memory based bank conflicts for GPUs. Journal of systems architecture, 127, Article ID 102518.
Open this publication in new window or tab >>Symbolic identification of shared memory based bank conflicts for GPUs
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2022 (English)In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 127, article id 102518Article in journal (Refereed) Published
Abstract [en]

Graphic processing units (GPUs) are routinely used for general purpose computations to improve performance. To achieve the sought performance gains, care must be invested in fine tuning the way GPU programs interact with the underlying architecture, accounting for the shared memory bank conflicts and the entailed shared memory transactions. Uncovering inputs leading to particular bank conflicts can turn out to be quite hard given the intricacy of the access patterns and their dependence on the inputs. We propose a symbolic execution based framework to systematically uncover shared memory bank conflicts, to propose inputs to realize a given number of shared memory transactions, and to refute the existence of such inputs if the number of shared memory transactions is impossible to achieve during the execution. This allows programmers to more formally reason about the shared memory conflicts and to validate their impact on performance and security. We have implemented our approach and report on our experiments to explore its usefulness towards performance enhancement and quantifying shared memory side-channel leakage in security applications.

Place, publisher, year, edition, pages
Amsterdam, Netherlands: Elsevier, 2022
Keywords
GPU; Shared memory; Formal verification; Performance evaluation; Software security
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-184473 (URN)10.1016/j.sysarc.2022.102518 (DOI)000797269300005 ()
Note

Funding: Swedish Research Council [2017-04194, 2018-05973]; Singapore Ministry of Education (MOE) [MOE2018-T2-1-098]; National Research Foundation (NRF) [NRF2019-NRF-ANR092]

Available from: 2022-04-22 Created: 2022-04-22 Last updated: 2022-06-08Bibliographically approved
Zhou, Y., Samii, S., Eles, P. I. & Peng, Z. (2022). Time-Triggered Scheduling for Time-Sensitive Networking with Preemption. In: : . Paper presented at 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), Taipei, Taiwan, 17-20 January, 2022 (pp. 262-267). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Time-Triggered Scheduling for Time-Sensitive Networking with Preemption
2022 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Time-Sensitive Networking (TSN) is a set of IEEE 802.1 technologies that support real-time and reliable Ethernet communication, commonly used in automotive and industrial automation systems. Time-aware scheduling is adopted in TSN to achieve high temporal predictability. In this paper, we demonstrate that such a scheduling solution alone does not always meet all timing requirements and must be combined with network preemption support. We propose an SMT-based synthesis method for preemptive time-triggered scheduling and routing in TSN. Our experiments demonstrate that schedulability is improved significantly when using frame preemption compared to a standard time-triggered message scheduling approach.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2022
Keywords
TSN, real-time systems, preemption, time-triggered scheduling
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-191290 (URN)10.1109/ASP-DAC52403.2022.9712545 (DOI)001228322500049 ()2-s2.0-85126138246 (Scopus ID)9781665421355 (ISBN)9781665421362 (ISBN)
Conference
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), Taipei, Taiwan, 17-20 January, 2022
Available from: 2023-01-25 Created: 2023-01-25 Last updated: 2024-11-18Bibliographically approved
Zhou, Y., Samii, S., Eles, P. I. & Peng, Z. (2021). ASIL-Decomposition BASIL-Decomposition Based Routing and Scheduling in Safety-Critical Time-Sensitive Networking. In: : . Paper presented at 2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS), Nashville, TN, USA, 18-21 May 2021 (pp. 184-195). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>ASIL-Decomposition BASIL-Decomposition Based Routing and Scheduling in Safety-Critical Time-Sensitive Networking
2021 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Due to their real-time constraints and high predictability requirements, safety-critical automotive applications are often implemented using time-triggered communication scheduling, which is supported in the Time-Sensitive Networking (TSN) standards. Applications and network communications are assigned Automotive Safety Integrity Levels (ASILs) based on the ISO 26262 standard for functional safety in automotive systems. ISO 26262 outlines, for each ASIL, requirements on coverage of random hardware errors and systematic errors. Prior research has addressed routing and scheduling for time-triggered messages in TSN in the context of random hardware errors and optimization of reliability metrics. However, no work to date has considered the functional safety aspects of addressing systematic errors. Specific to systematic errors, the ISO 26262 standard defines ASIL decomposition as a vehicle to decompose functions into independent components, each with a lower safety requirement than that of the original function. Since the cost of a component is increasing with its ASIL, decomposition can lower the total cost while still meeting the original safety requirements. In this paper, we propose an ASIL decomposition based technique to introduce redundant communication with lower-ASIL components in Ethernet systems with TSN-based time-triggered communication. The ASIL-aware routing and scheduling of messages are determined such that all safety requirements and end-to-end deadlines are satisfied and, at the same time, the total cost of the employed switches is minimized. Extensive experiments have been conducted to evaluate the efficiency of the proposed framework.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2021
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-178611 (URN)10.1109/RTAS52030.2021.00023 (DOI)000713558900015 ()9781665403863 (ISBN)9781665447393 (ISBN)
Conference
2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS), Nashville, TN, USA, 18-21 May 2021
Available from: 2021-08-24 Created: 2021-08-24 Last updated: 2021-12-03Bibliographically approved
Zhou, Y., Samii, S., Eles, P. I. & Peng, Z. (2021). Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking. ACM Transactions on Embedded Computing Systems, 20(5), 1-24, Article ID 41.
Open this publication in new window or tab >>Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking
2021 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 20, no 5, p. 1-24, article id 41Article in journal (Refereed) Published
Abstract [en]

Time-sensitive Networking (TSN) on Ethernet is a promising communication technology in the automotive and industrial automation industries due to its real-time and high-bandwidth communication capabilities. Time-triggered scheduling and static routing are often adopted in these areas due to high requirements on predictability for safety-critical applications. Deadline-constrained routing and scheduling in TSN have been studied extensively in past research. However, scheduling and routing with reliability requirements in the context of transient faults are not yet studied. In this work, we propose an Satisfiability Modulo Theory-based technique to perform scheduling and routing that takes both reliability constraints and end-to-end deadline constraints into consideration. Heuristics have been applied to improve the scalability of the solution. Extensive experiments have been conducted to demonstrate the efficiency of our proposed technique.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2021
Keywords
Safety-critical systems; Ethernet TSN
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-178613 (URN)10.1145/3458768 (DOI)000679808100004 ()2-s2.0-85111687698 (Scopus ID)
Available from: 2021-08-24 Created: 2021-08-24 Last updated: 2023-01-11Bibliographically approved
Mahfouzi, R., Aminifar, A., Samii, S., Eles, P. I. & Peng, Z. (2021). Secure Cloud Control Using Verifiable Computation. In: 2021 IEEE International Conference on Omni-Layer Intelligent Systems (IEEE COINS 2021): . Paper presented at IEEE International Conference on Omni-Layer Intelligent Systems (IEEE COINS), ELECTR NETWORK, aug 23-26, 2021 (pp. 21-26). Barcelona, Spain: IEEE
Open this publication in new window or tab >>Secure Cloud Control Using Verifiable Computation
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2021 (English)In: 2021 IEEE International Conference on Omni-Layer Intelligent Systems (IEEE COINS 2021), Barcelona, Spain: IEEE, 2021, p. 21-26Conference paper, Published paper (Refereed)
Abstract [en]

Security for outsourced control applications can be provided if the physical plant is enabled with a mechanism to verify the control signal received from the cloud. Recent developments in modern cryptography claim the applicability of verifiable computation techniques. Such techniques allow a client to check the correctness of a remote execution. This article delivers a proof of concept for applicability of the verifiable computation scheme to control applications over the cloud. We showcase the practicality of verifiable computation on physical plants with different timing demands and deliver a real-life example using a watertank system as the client and Microsoft Azure as the cloud. We show the effectiveness of the verifiable computation scheme on cloud-based implementation of advanced control methods, such as Model Predictive Control.

Place, publisher, year, edition, pages
Barcelona, Spain: IEEE, 2021
Keywords
verifiable computation; predictive control; outsourced control; secure cloud control
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-179044 (URN)10.1109/COINS51742.2021.9524115 (DOI)000855957700004 ()9781665431569 (ISBN)9781665431576 (ISBN)
Conference
IEEE International Conference on Omni-Layer Intelligent Systems (IEEE COINS), ELECTR NETWORK, aug 23-26, 2021
Available from: 2021-09-08 Created: 2021-09-08 Last updated: 2022-10-12
Ganjei, Z., Rezine, A., Eles, P. I. & Peng, Z. (2021). Verifying Safety of Parameterized Heard-Of Algorithms. In: Chryssis Georgiou and Rupak Majumdar (Ed.), : . Paper presented at  Networked Systems. 8th International Conference, NETYS 2020 (pp. 209-226). Springer, 12129
Open this publication in new window or tab >>Verifying Safety of Parameterized Heard-Of Algorithms
2021 (English)In: / [ed] Chryssis Georgiou and Rupak Majumdar, Springer, 2021, Vol. 12129, p. 209-226Conference paper, Published paper (Refereed)
Abstract [en]

We consider the problem of automatically checking safety properties of fault-tolerant distributed algorithms. We express the considered class of distributed algorithms in terms of the Heard-Of Model where arbitrary many processes proceed in infinite rounds in the presence of failures such as message losses or message corruptions. We propose, for the considered class, a sound but (in general) incomplete procedure that is guaranteed to terminate even in the presence of unbounded numbers of processes. In addition, we report on preliminary experiments for which either correctness is proved by our approach or a concrete trace violating the considered safety property is automatically found.

Place, publisher, year, edition, pages
Springer, 2021
Series
Lecture Notes in Computer Science, ISSN 0302-9743, E-ISSN 1611-3349
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-175907 (URN)10.1007/978-3-030-67087-0_14 (DOI)001330617300014 ()978-3-030-67086-3 (ISBN)978-3-030-67087-0 (ISBN)
Conference
 Networked Systems. 8th International Conference, NETYS 2020
Available from: 2021-05-26 Created: 2021-05-26 Last updated: 2024-11-28
Mahfouzi, R., Aminifar, A., Samii, S., Payer, M., Eles, P. I. & Peng, Z. (2019). Butterfly Attack: Adversarial Manipulation of Temporal Properties of Cyber-Physical Systems. In: : . Paper presented at 2019 IEEE Real-Time Systems Symposium (RTSS). IEEE
Open this publication in new window or tab >>Butterfly Attack: Adversarial Manipulation of Temporal Properties of Cyber-Physical Systems
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2019 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Increasing internet connectivity poses an existential threat for cyber-physical systems. Securing these safety-critical systems becomes an important challenge. Cyber-physical systems often comprise several control applications that are implemented on shared platforms where both high and low criticality tasks execute together (to reduce cost). Such resource sharing may lead to complex timing behaviors and, in turn, counter-intuitive timing anomalies that can be exploited by adversaries to destabilize a critical control system, resulting in irreversible consequences. We introduce the butterfly attack, a new attack scenario against cyber-physical systems that carefully exploits the sensitivity of control applications with respect to the implementation on the underlying execution platforms. We illustrate the possibility of such attacks using two case-studies from the automotive and avionic domains.

Place, publisher, year, edition, pages
IEEE, 2019
Series
IEEE Real-Time Systems Symposium (RTSS), ISSN 1052-8725, E-ISSN 2576-3172
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-168752 (URN)10.1109/RTSS46320.2019.00019 (DOI)000568160700009 ()978-1-7281-6463-2 (ISBN)978-1-7281-6464-9 (ISBN)
Conference
2019 IEEE Real-Time Systems Symposium (RTSS)
Available from: 2020-08-31 Created: 2020-08-31 Last updated: 2020-09-30
Zhou, Y., Samii, S., Eles, P. & Peng, Z. (2019). Partitioned and overhead-aware scheduling of mixed-criticality real-time systems. In: 24th Asia and South Pacific Design Automation Conference: . Paper presented at Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 21 - 24, 2019 (pp. 39-44). New York: Association for Computing Machinery (ACM)
Open this publication in new window or tab >>Partitioned and overhead-aware scheduling of mixed-criticality real-time systems
2019 (English)In: 24th Asia and South Pacific Design Automation Conference, New York: Association for Computing Machinery (ACM), 2019, p. 39-44Conference paper, Published paper (Refereed)
Abstract [en]

Modern real-time embedded and cyber-physical systems comprise a large number of applications, often of different criticalities, executing on the same computing platform. Partitioned scheduling is used to provide temporal isolation among tasks with different criticalities. Isolation is often a requirement, for example, in order to avoid the case when a low criticality task overruns or fails in such a way that causes a failure in a high criticality task. When the number of partitions increases in mixed criticality systems, the size of the schedule table can become extremely large, which becomes a critical bottleneck due to design time and memory constraints of embedded systems. In addition, switching between partitions at runtime causes CPU overhead due to preemption. In this paper, we propose a design framework comprising a hyper-period optimization algorithm, which reduces the size of schedule table and preserves schedulability, and a re-scheduling algorithm to reduce the number of preemptions. Extensive experiments demonstrate the effectiveness of proposed algorithms and design framework.

Place, publisher, year, edition, pages
New York: Association for Computing Machinery (ACM), 2019
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-160489 (URN)10.1145/3287624.3287653 (DOI)000507459700016 ()2-s2.0-85061136107 (Scopus ID)978-1-4503-6007-4 (ISBN)
Conference
Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 21 - 24, 2019
Available from: 2019-09-24 Created: 2019-09-24 Last updated: 2020-02-17Bibliographically approved
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