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Wahab, Qamar
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Publications (10 of 79) Show all publications
Arshad, S., Ramzan, R. & Wahab, Q.-u. (2018). 50-830 MHz noise and distortion canceling CMOS low noise amplifier. Integration, 60, 63-73
Open this publication in new window or tab >>50-830 MHz noise and distortion canceling CMOS low noise amplifier
2018 (English)In: Integration, ISSN 0167-9260, E-ISSN 1872-7522, Vol. 60, p. 63-73Article in journal (Refereed) Published
Abstract [en]

In this paper, a modified resistive shunt feedback topology is proposed that performs noise cancelation and serves as an opposite polarity non-linearity generator to cancel the distortion produced by the main stage. The proposed topology has a bandwidth similar to a resistive shunt feedback LNA, but with a superior noise figure (NF) and linearity. The proposed wideband LNA is fabricated in 130 nm CMOS technology and occupies an area of 0.5 mm(2). Measured results depict 3-dB bandwidth from 50 to 830 MHz. The measured gain and NF at 420 MHz are 17 dB and 2.2 dB, respectively. The high value of the 1/f noise is one of the key problems in low frequency CMOS designs. The proposed topology also addresses this challenge and a low NF is attained at low frequencies. Measured 811 and S22 are better than -8.9 dB and -8.5 dB, respectively within the 0.05-1 GHz band. The 1-dB compression point is -11.5 dBm at 700 MHz, while the IIP3 is -6.3 dBm. The forward core consumes 14 mW from a 1.8 V supply. This LNA is suitable for VHF and UHF SDR communication receivers.

Place, publisher, year, edition, pages
Elsevier, 2018
Keywords
CMOS; Distortion; Feedback; FOM; Linearity; LNA; Noise; Wideband
National Category
Signal Processing
Identifiers
urn:nbn:se:liu:diva-143987 (URN)10.1016/j.vlsi.2017.07.006 (DOI)000417777200007 ()2-s2.0-85027240956 (Scopus ID)
Note

Funding Agencies|UAE University, Alain, UAE [31N157]

Available from: 2018-01-02 Created: 2018-01-02 Last updated: 2018-01-12Bibliographically approved
Khan, H. R., Qureshi, A. R., Zafar, F. & Wahab, Q. U. (2014). Design of a Broadband Current Mode Class-D Power Amplifier with Harmonic Suppression. In: 2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS): . Paper presented at 12th IEEE International New Circuits and Systems Conference (IEEE NEWCAS) (pp. 169-172). IEEE
Open this publication in new window or tab >>Design of a Broadband Current Mode Class-D Power Amplifier with Harmonic Suppression
2014 (English)In: 2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), IEEE , 2014, p. 169-172Conference paper, Published paper (Refereed)
Abstract [en]

Current Mode Class-D Power Amplifiers (CMC-DPA) are attractive for fully integrated PA implementation as the output capacitance of the active device can be absorbed in the output matching network that can be realized with minimum number of components. This paper presents a simplified design approach for CMCD PA design using an integrated balun transformers. Also, expressions are derived for the optimum device sizing for second harmonic suppression resulting in improved efficiency. The amplifier is implemented in 130 nm CMOS process and encapsulated in QFN package. Measurement results show that the amplifier exhibits broadband response between 1.4 GHz and 2.1 GHz with peak output power of 26.8 dBm at 1.8 GHz using a 2.4 V supply. PAE remains above 40% for the entire range while peak PAE and drain efficiency are 45% and 48%, respectively.

Place, publisher, year, edition, pages
IEEE, 2014
Keywords
Current Mode Class-D; ClassE/F-odd; Balun; CMOS; Efficiency; broadband
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:liu:diva-123098 (URN)10.1109/NEWCAS.2014.6934010 (DOI)000363906700041 ()978-1-4799-4885-7 (ISBN)
Conference
12th IEEE International New Circuits and Systems Conference (IEEE NEWCAS)
Available from: 2015-12-03 Created: 2015-12-03 Last updated: 2016-11-01
Arshad, S., Ramzan, R., Zafar, F. & Wahab, Q.-U. (2014). Highly Linear Inductively Degenerated 0.13 mu m CMOS LNA using FDC Technique. In: 2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS): . Paper presented at IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (pp. 225-228). IEEE
Open this publication in new window or tab >>Highly Linear Inductively Degenerated 0.13 mu m CMOS LNA using FDC Technique
2014 (English)In: 2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), IEEE , 2014, p. 225-228Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M-6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M-2 and M-3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13 mu m CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13 mu m CMOS in 2.4GHz frequency band.

Place, publisher, year, edition, pages
IEEE, 2014
Keywords
High linearity; feed forward distortion cancellation (FDC); linear LNA; linearity improvement of LNA; IIP3 of LNA; WLAN LNA
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:liu:diva-122080 (URN)10.1109/APCCAS.2014.7032760 (DOI)000361128200054 ()978-1-4799-5230-4 (ISBN)
Conference
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
Available from: 2015-10-20 Created: 2015-10-19 Last updated: 2015-10-28
Khan, H. R., Qureshi, A. R., Zafar, F. & ul Wahab, Q. (2014). PWM with Differential Class-E Amplifier for Efficiency Enhancement at Back-Off Power Levels. In: 2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS): . Paper presented at 57th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 607-610). IEEE
Open this publication in new window or tab >>PWM with Differential Class-E Amplifier for Efficiency Enhancement at Back-Off Power Levels
2014 (English)In: 2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), IEEE , 2014, p. 607-610Conference paper, Published paper (Refereed)
Abstract [en]

A simplified output matching network for pulse width modulated Class-E Power Amplifier for efficiency enhancement at back-off power level is proposed. The shunt capacitance and the series inductance in the Class-E PA are realized through capacitor banks that are tuned according to the duty cycle to meet ZVS conditions. The differential PA design is implemented in 130 nm CMOS technology achieving maximum Pout of 24.8 dBm at 1.8 GHz with PAE better than 38% at 50% duty cycle. The output power is modulated with the input duty cycle and provides 6.2 dB back-off power level keeping PAE almost constant around 38%.

Place, publisher, year, edition, pages
IEEE, 2014
Series
Midwest Symposium on Circuits and Systems Conference Proceedings, ISSN 1548-3746
Keywords
PWM; Class-E; LC lattice balun; Power Back Off(PBO); capacitor bank
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:liu:diva-116529 (URN)10.1109/MWSCAS.2014.6908488 (DOI)000350205800152 ()978-1-4799-4132-2 (ISBN)
Conference
57th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
Available from: 2015-03-27 Created: 2015-03-27 Last updated: 2015-03-27
Asghar, M., Iqbal, F., Faraz, S., Jokubavicius, V., Wahab, Q. & Syväjärvi, M. (2012). Characterization of deep level defects in sublimation grown p-type 6H-SiC epilayers by deep level transient spectroscopy. Paper presented at 26th International Conference on Defects in Semiconductors. Elsevier, 407(15)
Open this publication in new window or tab >>Characterization of deep level defects in sublimation grown p-type 6H-SiC epilayers by deep level transient spectroscopy
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2012 (English)Conference paper, Published paper (Refereed)
Abstract [en]

In this study deep level transient spectroscopy has been performed on boron-nitrogen co-doped 6H-SiC epilayers exhibiting p-type conductivity with free carrier concentration (N-A-N-D)similar to 3 x 10(17) cm(-3). We observed a hole H-1 majority carrier and an electron E-1 minority carrier traps in the device having activation energies E-nu + 0.24 eV, E-c -0.41 eV, respectively. The capture cross-section and trap concentration of H-1 and E-1 levels were found to be (5 x 10(-19) cm(2), 2 x 10(15) cm(-3)) and (1.6 x 10(-16) cm(2), 3 x 10(15) cm(-3)), respectively. Owing to the background involvement of aluminum in growth reactor and comparison of the obtained data with the literature, the H-1 defect was identified as aluminum acceptor. A reasonable justification has been given to correlate the E-1 defect to a nitrogen donor.

Place, publisher, year, edition, pages
Elsevier, 2012
Keywords
SiC; DLTS; Acceptors; Donors; Doping; Deep level defects; LED
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-79662 (URN)10.1016/j.physb.2011.08.085 (DOI)000305790800057 ()
Conference
26th International Conference on Defects in Semiconductors
Available from: 2012-08-14 Created: 2012-08-13 Last updated: 2012-10-21
Ramzan, R., Zafar, F., Arshad, S. & Wahab, Q. U. (2012). Figure of merit for narrowband, wideband and multiband LNAs. International journal of electronics (Print), 99(11), 1603-1610
Open this publication in new window or tab >>Figure of merit for narrowband, wideband and multiband LNAs
2012 (English)In: International journal of electronics (Print), ISSN 0020-7217, E-ISSN 1362-3060, Vol. 99, no 11, p. 1603-1610Article in journal (Refereed) Published
Abstract [en]

In software defined radio, the same radio front end is used to accommodate different wireless standards operating in different frequency bands. The use of wideband or multiband low noise amplifiers (LNAs) is mandatory in such situations. There are several figures of merit (FoMs) proposed for narrowband LNAs. These FoMs are modified for wideband/multiband LNAs just by the inclusion of 3 dB bandwidth, and designers tend to use the one that favours their own design. In this article, a review of the existing FoMs for narrowband LNAs is presented. Based on this analysis, we propose two different FoMs for fair comparison of improvement in LNA parameters due to complementary metal oxide semiconductor (CMOS) technology advancement and circuit optimisation (irrespective of transistor technology), separately. The empirical technology scaling factor for gain, noise figure (NF), f(T) and linearity is used to differentiate between these FoMs for different types of LNAs.

Place, publisher, year, edition, pages
Taylor and Francis, 2012
Keywords
figure of merit (FoM), LNA FoM, multiband LNA (MB LNA), multi-standard LNA, narrowband LNA (NB LNA), wideband LNA (WB LNA)
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-85307 (URN)10.1080/00207217.2012.692635 (DOI)000309704600012 ()
Available from: 2012-11-15 Created: 2012-11-15 Last updated: 2017-12-07
Asghar, M., Iqbal, F., Faraz, S. M., Jokubavicius, V., Wahab, Q. & Syväjärvi, M. (2012). Study of deep level defects in doped and semi-insulating n-6H-SiC epilayers grown by sublimation method. Paper presented at -. Elsevier, 407(15)
Open this publication in new window or tab >>Study of deep level defects in doped and semi-insulating n-6H-SiC epilayers grown by sublimation method
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2012 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Deep level transient spectroscopy (DLTS) is employed to study deep level defects in n-6H-SiC (silicon carbide) epilayers grown by the sublimation method. To study the deep level defects in n-6H-SiC, we used as-grown, nitrogen doped and nitrogen-boron co-doped samples represented as ELS-1, ELS-11 and ELS-131 having net (N-D-N-A) similar to 2.0 x 10(12) cm(-3), 2 x 10(16) cm(-3) and 9 x 10(15) cm(3), respectively. The DLTS measurements performed on ELS-1 and ELS-11 samples revealed three electron trap defects (A, B and C) having activation energies E-c - 0.39 eV, E-c - 0.67 eV and E-c - 0.91 eV, respectively. While DLTS spectra due to sample ELS-131 displayed only A level. This observation indicates that levels B and C in ELS-131 are compensated by boron and/or nitrogen-boron complex. A comparison with the published data revealed A, B and C to be E-1/E-2, Z(1)/Z(2) and R levels, respectively.

Place, publisher, year, edition, pages
Elsevier, 2012
Keywords
n-Type 6H-SiC; Sublimation growth process; DLTS; Deep level defects; Surface defect; Co-doping
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-79661 (URN)10.1016/j.physb.2011.08.036 (DOI)000305790800056 ()
Conference
-
Available from: 2012-08-14 Created: 2012-08-13 Last updated: 2012-10-21
Faraz, S. M., Alvi, M. N., Henry, A., Nur, O., Willander, M. & Ul Wahab, Q. (2011). Annealing Effects on Electrical and Optical Properties of N-ZnO/P-Si Heterojunction Diodes. In: Advanced Materials Research Vol. 324 (2011) pp 233-236 (pp. 233-236). Trans Tech Publications Inc.
Open this publication in new window or tab >>Annealing Effects on Electrical and Optical Properties of N-ZnO/P-Si Heterojunction Diodes
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2011 (English)In: Advanced Materials Research Vol. 324 (2011) pp 233-236, Trans Tech Publications Inc., 2011, p. 233-236Conference paper, Published paper (Refereed)
Abstract [en]

The effects of post fabrication annealing on the electrical characteristics of n-ZnO/p-Si heterostructure are studied. The nanorods of ZnO are grown by aqueous chemical growth (ACG) technique on p-Si substrate and ohmic contacts of Al/Pt and Al are made on ZnO and Si. The devices are annealed at 400 and 600 oC in air, oxygen and nitrogen ambient. The characteristics are studied by photoluminescence (PL), current–voltage (I-V) and capacitance - voltage (C-V) measurements. PL spectra indicated higher ultraviolet (UV) to visible emission ratio with a strong peak of near band edge emission (NBE) centered from 375-380 nm and very weak broad deep-level emissions (DLE) centered from 510-580 nm. All diodes show typical non linear rectifying behavior as characterized by I-V measurements. The results indicated that annealing in air and oxygen resulted in better electrical characteristics with a decrease in the reverse current.

Place, publisher, year, edition, pages
Trans Tech Publications Inc., 2011
Keywords
nealing, Optical Property, ZnO Nanorod, ZnO/Si Heterojunction
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-73608 (URN)10.4028/www.scientific.net/AMR.324.233 (DOI)
Available from: 2012-01-10 Created: 2012-01-10 Last updated: 2014-10-08
Khan, H., Wahab, Q., Fritzin, J., Alvandpour, A. & Wahab, Q. (2010). A 900 MHz 26.8 dBm differential Class-E CMOS power amplifier in German Microwave Conference Digest of Papers, GeMIC 2010, vol , issue , pp 276-279. In: German Microwave Conference Digest of Papers, GeMIC 2010 (pp. 276-279).
Open this publication in new window or tab >>A 900 MHz 26.8 dBm differential Class-E CMOS power amplifier in German Microwave Conference Digest of Papers, GeMIC 2010, vol , issue , pp 276-279
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2010 (English)In: German Microwave Conference Digest of Papers, GeMIC 2010, 2010, p. 276-279Conference paper, Published paper (Refereed)
Abstract [en]

A 900 MHz differential Class-E amplifier with finite dc inductance has been designed in CMOS. The large inductance of RF choke has been replaced with a finite inductance that provides the required inductive reactance of the class E amplifier. Resonance circuit is realized without series inductor by novel use of lattice LC balun. The amplifier delivers 26.8 dBm power to a 50 O load from a 2.2 V supply. A maximum Power Added Efficiency (PAE) of 43% is achieved.

Keywords
Component; Class E; Differential amplifier; Finite inductance; Lattice LC balun
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-59089 (URN)
Available from: 2010-09-21 Created: 2010-09-09 Last updated: 2019-09-05
Kashif, A.-U., Svensson, C., Hayat, K., Azam, S., Akhter, N., Imran, M. & Wahab, Q.-u. (2010). A TCAD approach for non-linear evaluation of microwave power transistor and its experimental verification by LDMOS. Journal of Computational Electronics, 9(2), 79-86
Open this publication in new window or tab >>A TCAD approach for non-linear evaluation of microwave power transistor and its experimental verification by LDMOS
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2010 (English)In: Journal of Computational Electronics, ISSN 1569-8025, E-ISSN 1572-8137, Vol. 9, no 2, p. 79-86Article in journal (Refereed) Published
Abstract [en]

A simulation technique is developed in TCAD to study the non-linear behavior of RF power transistor. The technique is based on semiconductor transport equations to swot up the overall non-linearity’s occurring in RF power transistor. Computational load-pull simulation technique (CLP) developed in our group, is further extended to study the non-linear effects inside the transistor structure by conventional two-tone RF signals, and initial simulations were done in time domain. The technique is helpful to detect, understand the phenomena and its mechanism which can be resolved and improve the transistor performance. By this technique, the third order intermodulation distortion (IMD3) was observed at different power levels. The technique was successfully implemented on a laterally-diffused field effect transistor (LDMOS). The value of IMD3 obtained is −22 dBc at 1-dB compression point (P 1 dB) while at 10 dB back off the value increases to −36 dBc. Simulation results were experimentally verified by fabricating a power amplifier with the similar LDMOS transistor.

Place, publisher, year, edition, pages
SpringerLink, 2010
Keywords
Power amplifier, Non-linear analysis, Technology CAD, RF transistor, Time-domain analysis
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-61593 (URN)10.1007/s10825-010-0307-x (DOI)
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2017-12-12Bibliographically approved
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