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Ohlsson, Henrik
Publications (10 of 17) Show all publications
Eklund, A., Ohlsson, H., Andersson, M., Rydell, J., Ynnerman, A. & Knutsson, H. (2009). Balancing an Inverted Pendulum by Thinking A Real-Time fMRI Approach. Paper presented at SSBA Symposium on Image Analysis, 18-20 March, Halmstad, Sweden, 2009.
Open this publication in new window or tab >>Balancing an Inverted Pendulum by Thinking A Real-Time fMRI Approach
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2009 (English)Conference paper, Published paper (Other academic)
Abstract [en]

We present a method for controlling a dynamical system using real-time fMRI. The objective for the subject in the MR scanner is to balance an inverse pendulum by activating the left or right hand or resting. The brain activity is classified each second by a neural network and the classification is sent to a pendulum simulator to change the force applied to the pendulum. The state of the inverse pendulum is shown to the subject in a pair of VR goggles. The subject was able to balance the inverse pendulum both with real activity and imagined activity. The developments here have a potential to aid people with communication disabilities e.g., locked in people. It might also be a tool for stroke patients to be ableto train the damaged brain area and get real-time feedback of when they do it right.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-65737 (URN)
Conference
SSBA Symposium on Image Analysis, 18-20 March, Halmstad, Sweden, 2009
Available from: 2011-02-18 Created: 2011-02-18 Last updated: 2015-09-22Bibliographically approved
Gustafsson, O. & Ohlsson, H. (2005). A Low Power Decimation Filter Architecture for High-Speed Single-Bit Sigma-Delta Modulation. In: IEEE International Symposium on Circuits and Systems,2005 (pp. 1453). Piscataway, NJ: IEEE
Open this publication in new window or tab >>A Low Power Decimation Filter Architecture for High-Speed Single-Bit Sigma-Delta Modulation
2005 (English)In: IEEE International Symposium on Circuits and Systems,2005, Piscataway, NJ: IEEE , 2005, p. 1453-Conference paper, Published paper (Refereed)
Abstract [en]

In this work a novel architecture suitable for high-speed FIR decimation filters for single-bit sigma-delta modulation is proposed. By using efficient data and coefficient representation the total number of partial products is reduced leading to low power consumption. The work is focused on filters designed based on cascaded comb filters, although the approach is applicable to any FIR filter.

Place, publisher, year, edition, pages
Piscataway, NJ: IEEE, 2005
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-34590 (URN)22193 (Local ID)22193 (Archive number)22193 (OAI)
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2015-03-11
Löfvenberg, J., Gustafsson, O., Johansson, K., Lindkvist, T., Ohlsson, H. & Wanhammar, L. (2005). Coding schemes for deep sub-micron data buses. In: Radiovetenskap och Kommunikation, RVK05,2005.
Open this publication in new window or tab >>Coding schemes for deep sub-micron data buses
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2005 (English)In: Radiovetenskap och Kommunikation, RVK05,2005, 2005Conference paper, Published paper (Refereed)
Abstract [en]

We present two coding techniques for reducing the power dissipation in deep sub-micron, parallel data buses. The techniques differ in their parameter values and are suitable in different scenarios. In both cases typical reduction in power dissipation is 20%.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-28726 (URN)13898 (Local ID)13898 (Archive number)13898 (OAI)
Available from: 2009-10-09 Created: 2009-10-09 Last updated: 2015-03-11
Ohlsson, H., Mesgarzadeh, B., Johansson, K., Gustafsson, O., Löwenborg, P., Johansson, H. & Alvandpour, A. (2004). A 16 GSPS 0.18 µm CMOS decimator for single-bit ∑∆-modulation.. In: Norchip,2004 (pp. 175). Piscataway: IEEE Inc.
Open this publication in new window or tab >>A 16 GSPS 0.18 µm CMOS decimator for single-bit ∑∆-modulation.
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2004 (English)In: Norchip,2004, Piscataway: IEEE Inc. , 2004, p. 175-Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
Piscataway: IEEE Inc., 2004
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:liu:diva-22650 (URN)1937 (Local ID)1937 (Archive number)1937 (OAI)
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11
Lindkvist, T., Löfvenberg, J., Ohlsson, H., Johansson, K. & Wanhammar, L. (2004). A Power-Efficient, Low-Complexity, Memoryless Coding Scheme for Buses with Dominating Inter-Wire Capacitances. In: IEEE International Workshop on System on Chip for Real-Time Applications,2004 (pp. 257). Los Alamitos, California, USA: IEEE Computer Society
Open this publication in new window or tab >>A Power-Efficient, Low-Complexity, Memoryless Coding Scheme for Buses with Dominating Inter-Wire Capacitances
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2004 (English)In: IEEE International Workshop on System on Chip for Real-Time Applications,2004, Los Alamitos, California, USA: IEEE Computer Society , 2004, p. 257-Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we present a simplified model of parallel, on-chip buses, motivated by the movement toward CMOS technologies where the ratio between inter-wire capacitance and wire-to-ground capacitance is very large. We also introduce a ternary bus state representation, suitable for the bus model. Using this representation we propose a coding scheme without memory which reduces energy dissipation in the bus model by approximately 20-30% compared to an uncoded system. At the same time the proposed coding scheme is easy to realize, in terms of standard cells needed, compared to several previously proposed solutions.

Place, publisher, year, edition, pages
Los Alamitos, California, USA: IEEE Computer Society, 2004
Keywords
Low-power VLSI, coding for low power
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-22901 (URN)2252 (Local ID)2252 (Archive number)2252 (OAI)
Available from: 2009-10-07 Created: 2009-10-07
Ohlsson, H., Gustafsson, O. & Wanhammar, L. (2004). A shifted permuted difference coefficient method. In: Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, Volume 3: . Paper presented at IEEE International Symposium on Circuits and Systems, May 23-26, Vancouver, British Columbia, Canada (pp. III-161-4).
Open this publication in new window or tab >>A shifted permuted difference coefficient method
2004 (English)In: Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, Volume 3, 2004, p. III-161-4Conference paper, Published paper (Other academic)
Abstract [en]

In this paper we propose a method for implementation of sum-of-products using a shifted permuted difference coefficient method. Here we focus on implementation of FIR filters but the method is generally applicable to computation of sum-of-products. In this work we identify two fundamental blocks in the difference coefficient structure, a permutation network and an adder network. The former determine how the difference coefficients are selected while the latter computes the differences. We also propose that the differences are computed on odd, integer coefficients only. The proposed method is fast and yields filter implementations with low arithmetic complexity. This makes it a good candidate for being incorporated into the search for quantized coefficients in the synthesis of FIR filters.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-23668 (URN)10.1109/ISCAS.2004.1328708 (DOI)3163 (Local ID)0-7803-8251-X (ISBN)3163 (Archive number)3163 (OAI)
Conference
IEEE International Symposium on Circuits and Systems, May 23-26, Vancouver, British Columbia, Canada
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved
Ohlsson, H., Gustafsson, O. & Wanhammar, L. (2004). Implementation of low complexity FIR filters using a minimum spanning tree. In: Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, 2004. MELECON 2004, Volume 1: . Paper presented at The 12th IEEE Mediterranean Electrotechnical Conference, 2004, May 12-15, 2004, Dubrovnik, Croatia (pp. 261-264). IEEE
Open this publication in new window or tab >>Implementation of low complexity FIR filters using a minimum spanning tree
2004 (English)In: Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, 2004. MELECON 2004, Volume 1, IEEE , 2004, p. 261-264Conference paper, Published paper (Other academic)
Abstract [en]

In this paper we propose a method for implementation of multiple constant multiplications, as used in, for example, FIR filters. The method is shifted difference coefficient method where the differences are selected using a minimum spanning tree. By finding a minimum spanning tree of an undirected graph, corresponding to the coefficients, an implementation of a multiple constant multiplication block with low arithmetic complexity is obtained. There are algorithms that find a minimum spanning tree in polynomial time, making the proposed method computational efficient. We also propose that the differences are computed on odd coefficients only. This reduces the number of adders in an implementation further, compared to other difference coefficient methods. Several stages of differences, i.e., a set of differences is used to compute a new set of higher order differences, may also be used. We show that the proposed method give optimal, or close to optimal, results with respect to the number of additions required for a number of FIR filter implementations.

Place, publisher, year, edition, pages
IEEE, 2004
Keywords
Implementation FIR filters
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-23672 (URN)10.1109/MELCON.2004.1346826 (DOI)3167 (Local ID)0-7803-8271-4 (ISBN)3167 (Archive number)3167 (OAI)
Conference
The 12th IEEE Mediterranean Electrotechnical Conference, 2004, May 12-15, 2004, Dubrovnik, Croatia
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved
Ohlsson, H., Gustafsson, O. & Wanhammar, L. (2004). Implementation of low-complexity FIR filters using difference methods. In: Swedish System-on-Chip Conference 2004, April 13-14, Båstad, Sweden: . Paper presented at The Swedish System-on-Chip Conference 2004, April 13-14, Båstad, Sweden.
Open this publication in new window or tab >>Implementation of low-complexity FIR filters using difference methods
2004 (English)In: Swedish System-on-Chip Conference 2004, April 13-14, Båstad, Sweden, 2004Conference paper, Published paper (Other academic)
Abstract [en]

In this paper we discuss implementation of low-complexity FIR filters using difference methods. By realizing the differences between coefficients and from them the actual coefficients, the complexity of the filter implementations can be reduced. Here two different methods are proposed for selecting the differences. Both methods can be implemented with low execution times, making it possible to include them in the search for quantized filter coefficients.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-23611 (URN)3101 (Local ID)3101 (Archive number)3101 (OAI)
Conference
The Swedish System-on-Chip Conference 2004, April 13-14, Båstad, Sweden
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved
Gustafsson, O., Ohlsson, H. & Wanhammar, L. (2004). Improved multiple constant multiplication using minimum spanning trees. In: Michael B. Matthews (Ed.), Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, 2004,  Volume 1: . Paper presented at The Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, 7-10 November, Pacific Grove, California, USA (pp. 63-66). IEEE
Open this publication in new window or tab >>Improved multiple constant multiplication using minimum spanning trees
2004 (English)In: Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, 2004,  Volume 1 / [ed] Michael B. Matthews, IEEE , 2004, p. 63-66Conference paper, Published paper (Other academic)
Abstract [en]

Recently, a novel technique for the multiple constant multiplication (MCM) problem using minimum spanning trees (MSTs) has been proposed. The approach works by finding simple differences between the coefficients to realize and then applying the same method to the differences (which is an MCM problem as well). Each iteration is divided into two steps. First, finding a minimum spanning tree in the graph describing the differences between the coefficients. Second, as each edge in the graph may correspond to more than one difference, one difference is selected for each edge in the MST. Generally, both these stages have multiple solutions. The aim of this work is to more closely study how the MST and the differences should be selected to give better total results. It is also discussed how the two stages in each iteration may be joined into one problem.

Place, publisher, year, edition, pages
IEEE, 2004
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-23601 (URN)10.1109/ACSSC.2004.1399088 (DOI)3091 (Local ID)0-7803-8622-1 (ISBN)3091 (Archive number)3091 (OAI)
Conference
The Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, 7-10 November, Pacific Grove, California, USA
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved
Gustafsson, O., Ohlsson, H. & Wanhammar, L. (2004). Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach. In: Proceedings of the 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004: . Paper presented at The 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004, June 11, Espoo, Finland (pp. 141-144). IEEE
Open this publication in new window or tab >>Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach
2004 (English)In: Proceedings of the 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004, IEEE , 2004, p. 141-144Conference paper, Published paper (Refereed)
Abstract [en]

In this paper a novel approach for realizing constant coefficient matrix multiplication using few additions and subtractions is proposed. This method is applicable in, e.g., FIR filter banks, transforms, and polyphase form FIR filters for sample rate changes. Examples show that the proposed method yields good results compared to realizing the matrix multiplication by utilizing multiple coefficient multiplication techniques for the rows or columns separately.

Place, publisher, year, edition, pages
IEEE, 2004
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-23657 (URN)3151 (Local ID)951-22-7065-X (ISBN)3151 (Archive number)3151 (OAI)
Conference
The 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004, June 11, Espoo, Finland
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved
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