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Jiang, Ke
Publications (10 of 16) Show all publications
Jiang, K., Eles, P. & Peng, Z. (2016). Power-Aware Design Techniques of Secure Multimode Embedded Systems. ACM Transactions on Embedded Computing Systems, 15, 6:1-6:29
Open this publication in new window or tab >>Power-Aware Design Techniques of Secure Multimode Embedded Systems
2016 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 15, p. 6:1-6:29Article in journal (Refereed) Published
Abstract [en]

Nowadays, embedded systems have been widely used in all types of application areas, some of which belong to the safety and reliability critical domains. The functional correctness and design robustness of the embedded systems involved in such domains are crucial for the safety of personal/enterprise property or even human lives. Thereby, a holistic design procedure that considers all the important design concerns is essential.

In this article, we approach embedded systems design from an integral perspective. We consider not only the classic real-time and quality of service requirements, but also the emerging security and power efficiency demands. Modern embedded systems are not any more developed for a fixed purpose, but instead designed for undertaking various processing requests. This leads to the concept of multimode embedded systems, in which the number and nature of active tasks change during runtime. Under dynamic situations, providing high performance along with various design concerns becomes a really difficult problem. Therefore, we propose a novel power-aware secure embedded systems design framework that efficiently solves the problem of runtime quality optimization with security and power constraints. The efficiency of our proposed techniques are evaluated in extensive experiments.

National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-128182 (URN)10.1145/2801152 (DOI)
Available from: 2016-05-20 Created: 2016-05-20 Last updated: 2018-01-10
Jiang, K., Eles, P. I. & Peng, Z. (2016). Power-Aware Design Techniques of Secure Multimode Embedded Systems. ACM Transactions on Embedded Computing Systems, 15(1), 6
Open this publication in new window or tab >>Power-Aware Design Techniques of Secure Multimode Embedded Systems
2016 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 15, no 1, p. 6-Article in journal (Refereed) Published
Abstract [en]

Nowadays, embedded systems have been widely used in all types of application areas, some of which belong to the safety and reliability critical domains. The functional correctness and design robustness of the embedded systems involved in such domains are crucial for the safety of personal/enterprise property or even human lives. Thereby, a holistic design procedure that considers all the important design concerns is essential. In this article, we approach embedded systems design from an integral perspective. We consider not only the classic real-time and quality of service requirements, but also the emerging security and power efficiency demands. Modern embedded systems are not any more developed for a fixed purpose, but instead designed for undertaking various processing requests. This leads to the concept of multimode embedded systems, in which the number and nature of active tasks change during runtime. Under dynamic situations, providing high performance along with various design concerns becomes a really difficult problem. Therefore, we propose a novel power-aware secure embedded systems design framework that efficiently solves the problem of runtime quality optimization with security and power constraints. The efficiency of our proposed techniques are evaluated in extensive experiments.

Place, publisher, year, edition, pages
ACM Press, 2016
Keyword
Design; Performance; Security; Embedded systems; multimode systems; system design and optimization; security; power-aware design; multiobjective optimization
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-127588 (URN)10.1145/2801152 (DOI)000373654000006 ()
Note

Funding Agencies|Swedish Research Council [B0621501]

Available from: 2016-05-03 Created: 2016-05-03 Last updated: 2018-01-10
Jiang, K., Eles, P., Peng, Z., Chattopadhyay, S. & Batina, L. (2016). SPARTA: A scheduling policy for thwarting differential power analysis attacks. In: 2016 21ST ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC): . Paper presented at 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC). 25-28 Jan. 2016 Macau (pp. 667-672). IEEE Press
Open this publication in new window or tab >>SPARTA: A scheduling policy for thwarting differential power analysis attacks
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2016 (English)In: 2016 21ST ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), IEEE Press, 2016, p. 667-672Conference paper, Published paper (Refereed)
Abstract [en]

Embedded systems (ESs) have been widely used in various application domains. It is very important to design ESs that guarantee functional correctness of the system under strict timing constraints. Such systems are known as the real-time embedded systems (RTESs). More recently, RTESs started to be utilized in safety and reliability critical areas, which made the overlooked security issues, especially confidentiality of the communication, a serious problem. Differential power analysis attacks (DPAs) pose serious threats to confidentiality protection mechanisms, i.e., implementations of cryptographic algorithms, on embedded platforms. In this work, we present a scheduling policy, SPARTA, that thwarts DPAs. Theoretical guarantees and preliminary experimental results are presented to demonstrate the efficiency of the SPARTA scheduler.

Place, publisher, year, edition, pages
IEEE Press, 2016
Series
Asia and South Pacific Design Automation Conference Proceedings, ISSN 2153-6961
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-129005 (URN)10.1109/ASPDAC.2016.7428088 (DOI)000384642200117 ()978-1-4673-9568-7 (ISBN)
Conference
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC). 25-28 Jan. 2016 Macau
Available from: 2016-06-08 Created: 2016-06-08 Last updated: 2018-01-10
Jiang, W., Jiang, K., Zhang, X. & Ma, Y. (2015). Energy Optimization of Security-Critical Real-Time Applications with Guaranteed Security Protection. Journal of systems architecture, 61(7), 282-292
Open this publication in new window or tab >>Energy Optimization of Security-Critical Real-Time Applications with Guaranteed Security Protection
2015 (English)In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 61, no 7, p. 282-292Article in journal (Refereed) Published
Abstract [en]

Designing energy-efficient applications has become of critical importance for embedded systems, especially for battery-powered systems. Additionally, the emerging requirements on both security and real-time make it much more difficult to produce ideal solutions. In this work, we address the emerging scheduling problem existed in the design of secure and energy-efficient real-time embedded systems. The objective is to minimize the system energy consumption subject to security and schedulability constraints. Due to the complexity of the problem, we propose a dynamic programming based approximation approach to find efficient solutions under given constraints. The proposed technique has polynomial time complexity which is half of existing approximation approaches. The efficiency of our algorithm is validated by extensive experiments and a real-life case study. Comparing with other approaches, the proposed approach achieves energy-saving up to 37.6% without violating the real-time and security constraints of the system.

Place, publisher, year, edition, pages
Elsevier, 2015
Keyword
Embedded system; Security; Energy; Real-time; Design optimization
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-120867 (URN)10.1016/j.sysarc.2015.05.005 (DOI)000359033000002 ()
Note

Funding Agencies|National Natural Science Foundation of China [61003032]; Research Fund of National Key Laboratory of Computer Architecture [CARCH201104]

Available from: 2015-08-28 Created: 2015-08-28 Last updated: 2018-01-11
Jiang, K. (2015). Security-Driven Design of Real-Time Embedded Systems. (Doctoral dissertation). Linköping: Linköping University Electronic Press
Open this publication in new window or tab >>Security-Driven Design of Real-Time Embedded Systems
2015 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

Real-time embedded systems (RTESs) have been widely used in modern society. And it is also very common to find them in safety and security critical applications, such as transportation and medical equipment. There are, usually, several constraints imposed on a RTES, for example, timing, resource, energy, and performance, which must be satisfied simultaneously. This makes the design of such systems a difficult problem.

More recently, the security of RTESs emerges as a major design concern, as more and more attacks have been reported. However, RTES security, as a parameter to be considered during the design process, has been overlooked in the past. This thesis approaches the design of secure RTESs focusing on aspects that are particularly important in the context of RTES, such as communication confidentiality and side-channel attack resistance.

Several techniques are presented in this thesis for designing secure RTESs, including hardware/software co-design techniques for communication confidentiality on distributed platforms, a global framework for secure multi-mode real-time systems, and a scheduling policy for thwarting differential power analysis attacks. 

All the proposed solutions have been extensively evaluated in a large amount of experiments, including two real-life case studies, which demonstrate the efficiency of the presented techniques.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press, 2015. p. 155
Series
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 1729
Keyword
Security, Embedded System, Real-Time System, Design, Optimization
National Category
Engineering and Technology Computer Systems
Identifiers
urn:nbn:se:liu:diva-123016 (URN)10.3384/diss.diva-123016 (DOI)978-91-7685-884-4 (ISBN)
Public defence
2016-02-10, Visionen, Hus B, Campus Valla, Linköping, 13:15 (English)
Opponent
Supervisors
Funder
CUGS (National Graduate School in Computer Science)
Available from: 2016-01-14 Created: 2015-12-01 Last updated: 2016-01-15Bibliographically approved
Jiang, W., Jiang, K., Zhang, X. & Ma, Y. (2014). Energy Aware Real-Time Scheduling Policy with Guaranteed Security Protection. In: 2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC): . Paper presented at 19th Asia and South Pacific Design Automation Conference (ASP-DAC) (pp. 317-322). IEEE conference proceedings
Open this publication in new window or tab >>Energy Aware Real-Time Scheduling Policy with Guaranteed Security Protection
2014 (English)In: 2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), IEEE conference proceedings, 2014, p. 317-322Conference paper, Published paper (Refereed)
Abstract [en]

In this work, we address the emerging scheduling problem existed in the design of secure and energy-efficient real-time embedded systems. The objective is to minimize the energy consumption subject to security and schedulability constraints. Due to the complexity of the problem, we propose a dynamic programming based approximation approach to find the near-optimal solutions with respect to predefined security constraint. The proposed technique has polynomial time complexity which is about half of traditional approximation approaches. The efficiency of our algorithm is validated by extensive experiments.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2014
Series
Asia and South Pacific Design Automation Conference Proceedings, ISSN 2153-6961
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-106736 (URN)10.1109/ASPDAC.2014.6742909 (DOI)000350791700060 ()2-s2.0-84897848096 (Scopus ID)978-1-4799-2816-3 (ISBN)
Conference
19th Asia and South Pacific Design Automation Conference (ASP-DAC)
Available from: 2014-05-20 Created: 2014-05-20 Last updated: 2018-01-11
Jiang, K., Batina, L., Eles, P. & Peng, Z. (2014). Robustness Analysis of Real-Time Scheduling Against Differential Power Analysis Attacks. In: IEEE Computer Society Annual Symposium on VLSI: . Paper presented at ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. (pp. 450-455). IEEE Computer Society
Open this publication in new window or tab >>Robustness Analysis of Real-Time Scheduling Against Differential Power Analysis Attacks
2014 (English)In: IEEE Computer Society Annual Symposium on VLSI, IEEE Computer Society, 2014, p. 450-455Conference paper, Published paper (Refereed)
Abstract [en]

Embedded systems (ESs) have been a prominent solution for enhancing system performance and reliability in recent years. ESs that are required to ensure functional correctness under timing constraints are referred to as real-time embedded systems (RTESs). With the emerging trend of utilizing RTESs in safety and reliability critical areas, security of RTESs, especially confidentiality of the communication, becomes of great importance. More recently, side-channel attacks (SCAs) posed serious threats to confidentiality protection mechanisms, namely, cryptographic algorithms. In this work, we present the first analytical framework for quantifying the influence of real-time scheduling policies on the robustness of secret keys against differential power analysis (DPA) attacks, one of the most popular type of SCAs. We validated the proposed concept on two representative scheduling algorithms, earliest deadline first scheduling (EDF) and rate-monotonic scheduling (RMS), via extensive experiments.

Place, publisher, year, edition, pages
IEEE Computer Society, 2014
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-112693 (URN)10.1109/ISVLSI.2014.11 (DOI)000361018000079 ()9781479937653 (ISBN)
Conference
ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014.
Available from: 2014-12-08 Created: 2014-12-08 Last updated: 2018-01-11
Jiang, K., Eles, P. & Peng, Z. (2013). A Design Framework for Dynamic Embedded Systems with Security Constraints. In: The 12th Swedish System-on-Chip Conference (SSoCC 2013), Ystad, Sweden, May 6-7, 2013 (not reviewed, not printed).: . Paper presented at SSoCC13.
Open this publication in new window or tab >>A Design Framework for Dynamic Embedded Systems with Security Constraints
2013 (English)In: The 12th Swedish System-on-Chip Conference (SSoCC 2013), Ystad, Sweden, May 6-7, 2013 (not reviewed, not printed)., 2013Conference paper, Oral presentation only (Other academic)
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-94334 (URN)
Conference
SSoCC13
Available from: 2013-06-24 Created: 2013-06-24 Last updated: 2018-01-11
Zhang, X., Zhan, J., Jiang, W., Ma, Y. & Jiang, K. (2013). Design Optimization of Energy- and Security-Critical Distributed Real-Time Embedded Systems. In: 15th Workshop on Advances in Parallel and Distributed Computational Models (APDCM 2013), Boston, USA, May 20, 2013.: . Paper presented at APDCM 2013 (pp. 741-750). IEEE Press
Open this publication in new window or tab >>Design Optimization of Energy- and Security-Critical Distributed Real-Time Embedded Systems
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2013 (English)In: 15th Workshop on Advances in Parallel and Distributed Computational Models (APDCM 2013), Boston, USA, May 20, 2013., IEEE Press, 2013, p. 741-750Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, we approach the design of energy- and security-critical distributed real-time embedded systems from the early mapping and scheduling phases. Modern Distributed Embedded Systems (DESs) are common to be connected to external networks, which is beneficial for various purposes, but also opens up the gate for potential security attacks. However, security protections in DESs result in significant time and energy overhead. In this work, we focus on the problem of providing the best confidentiality protection of internal communication in DESs under time and energy constraints. The complexity of finding the optimal solution grows exponentially as problem size grows. Therefore, we propose an efficient genetic algorithm based heuristic for solving the problem. Extensive experiments demonstrate the efficiency of the proposed technique.

Place, publisher, year, edition, pages
IEEE Press, 2013
National Category
Computer Sciences
Identifiers
urn:nbn:se:liu:diva-88964 (URN)10.1109/IPDPSW.2013.24 (DOI)978-0-7695-4979-8 (ISBN)
Conference
APDCM 2013
Available from: 2013-02-19 Created: 2013-02-19 Last updated: 2018-01-11
Zhang, X., Zhang, J., Jiang, W., Ma, Y. & Jiang, K. (2013). Design Optimization of Security-Sensitive Mixed-Criticality Real-Time Embedded Systems. In: : . Paper presented at 1st workshop on Real-Time Mixed Criticality Systems (ReTiMiCS2013)Taipei, Taiwan, 2013.
Open this publication in new window or tab >>Design Optimization of Security-Sensitive Mixed-Criticality Real-Time Embedded Systems
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2013 (English)Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we are interested in securitysensitive mixed-criticality real-time systems. Existing researches on mixed-criticality systems usually are safety-oriented, which seriously ignore the security requirements. We firstly establish the system model to capture security-critical applications in mixed-criticality systems. Higher security-criticality protection always results in significant time and energy overhead in mixedcriticality systems. Thus, this paper proposes a system-level design framework for energy optimization of security-sensitive mixed-criticality system. Since the time complexity of finding optimal solutions grows exponentially as problem size grows, a GA based efficient heuristic algorithm is devised to address the system-level optimization problem. Extensive experiments demonstrate the efficiency of the proposed technique, which can obtain balanced minimal energy consumption while satisfying strict security and timing constraints.

National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:liu:diva-118081 (URN)
Conference
1st workshop on Real-Time Mixed Criticality Systems (ReTiMiCS2013)Taipei, Taiwan, 2013
Available from: 2015-05-21 Created: 2015-05-21 Last updated: 2018-01-11
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