liu.seSearch for publications in DiVA
Endre søk
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
A 500-MHz low-voltage programmable gain amplifier for HD video in 65-nm CMOS
Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.ORCID-id: 0000-0002-2144-6795
2010 (engelsk)Inngår i: Proceedings of 28th IEEE Norchip Conference., NORCHIP'10, Tampere: www.ieee.org , 2010, s. 1-4Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

This work describes the implementation of a 1.2-V programmable gain amplifier (PGA) for high-definition (HD) video digitizers in a 65-nm digital CMOS process. The “pseudo” switched-capacitor (SC) PGA architecture buffers the video signal, without switching, during the active video. The SC circuitry is used for setup of DC operating point during horizontal and vertical blanking periods. Additionally, it compensates for the `sync-tip' of analog video signals to an equal blanking level for increased dynamic range to the digitizer following the PGA. The operational transconductance amplifier (OTA) employed as main amplifier in the PGA is a pseudo-differential, positive-feedback input stage architecture with a common-mode feedforward (CMFF) technique. The common-mode feedback (CMFB) is provided once two OTAs are cascaded. Schematic-level simulation results show that the OTA maintains a -3-dB bandwidth of 550 MHz, while keeping the distortion HD3 at -60 dB for a 30-MHz, 850 mVpp high definition video signal. The 88 dB DC gain is distributed among four OTA stages and the overall, combined PGA achieves a signal-to-noise ratio of 63 dB. Due to only two stacked transistors, it achieves high output swing of ±0.85 V, 1240 V/μs slew rate while consuming 10.4 mW power.

sted, utgiver, år, opplag, sider
Tampere: www.ieee.org , 2010. s. 1-4
Emneord [en]
CMOS analog integrated circuits, feedforward amplifiers, switched capacitor circuits, programmable gain amplifier.
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-70366DOI: 10.1109/NORCHIP.2010.5669450ISBN: 978-1-4244-8971-8 (tryckt)ISBN: 978-1-4244-8972-5 (tryckt)OAI: oai:DiVA.org:liu-70366DiVA, id: diva2:438571
Konferanse
NORCHIP'10, 15-16 November 2010,Tampere, Finland
Tilgjengelig fra: 2011-09-03 Laget: 2011-09-03 Sist oppdatert: 2018-11-08

Open Access i DiVA

Fulltekst mangler i DiVA

Andre lenker

Forlagets fulltekstieeexplore.ieee.org

Personposter BETA

Aamir, Syed AhmedWikner, J Jacob

Søk i DiVA

Av forfatter/redaktør
Aamir, Syed AhmedWikner, J Jacob
Av organisasjonen

Søk utenfor DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric

doi
isbn
urn-nbn
Totalt: 2340 treff
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf