liu.seSearch for publications in DiVA
Endre søk
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
Karatsuba with Rectangular Multipliers for FPGAs
University of Kassel, Digital Technology Group, Germany.
Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska fakulteten.ORCID-id: 0000-0003-3470-3911
Univ Lyon, INSA Lyon, Inria, CITI, France.
University of Kassel, Digital Technology Group, Germany.
Vise andre og tillknytning
2018 (engelsk)Inngår i: 2018 IEEE 25TH SYMPOSIUM ON COMPUTER ARITHMETIC (ARITH), IEEE, 2018, s. 13-20Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

This work presents an extension of Karatsuba's method to efficiently use rectangular multipliers as a base for larger multipliers. The rectangular multipliers that motivate this work are the embedded 18x25-bit signed multipliers found in the DSP blocks of recent Xilinx FPGAs: The traditional Karatsuba approach must under-use them as square 18x18 ones. This work shows that rectangular multipliers can be efficiently exploited in a modified Karatsuba method if their input word sizes have a large greatest common divider. In the Xilinx FPGA case, this can be obtained by using the embedded multipliers as 16x24 unsigned and as 17x25 signed ones.The obtained architectures are implemented with due detail to architectural features such as the pre-adders and post-adders available in Xilinx DSP blocks. They are synthesized and compared with traditional Karatsuba, but also with (non-Karatsuba) state-of-the-art tiling techniques that make use of the full rectangular multipliers. The proposed technique improves resource consumption and performance for multipliers of numbers larger than 64 bits.

sted, utgiver, år, opplag, sider
IEEE, 2018. s. 13-20
Serie
International Symposium on Computer Arithmetic, ISSN 1063-6889
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-150920DOI: 10.1109/ARITH.2018.8464809ISI: 000454795600003ISBN: 978-1-5386-2613-9 (digital)OAI: oai:DiVA.org:liu-150920DiVA, id: diva2:1245437
Konferanse
25th International Symposium on Computer Arithmetic, Amherst, MA, USA, June 25-27, 2018
Tilgjengelig fra: 2018-09-05 Laget: 2018-09-05 Sist oppdatert: 2019-01-21bibliografisk kontrollert

Open Access i DiVA

Fulltekst mangler i DiVA

Andre lenker

Forlagets fulltekst

Personposter BETA

Gustafsson, Oscar

Søk i DiVA

Av forfatter/redaktør
Gustafsson, Oscar
Av organisasjonen

Søk utenfor DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric

doi
isbn
urn-nbn
Totalt: 32 treff
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf