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FIR Filter Features on FPGA
Linköping University, Department of Electrical Engineering, Computer Engineering.
2018 (English)Independent thesis Basic level (university diploma), 10 credits / 15 HE creditsStudent thesis
Abstract [en]

Finite-length impulse response (FIR) filters are one of the most commonly used digital signal processing algorithms used nowadays where a FPGA is the device used to implement it. The continued development of the FPGA device through the insertion of dedicated blocks raised the need to study the advantages offered by different FPGA families. The work presented in this thesis study the special features offered by FPGAs for FIR filters and introduce a cost model of resource utilization. The used method consist of several stages including reading, classification of features and generating coefficients. The results show that FPGAs have common features but also specific differences in features as well as resource utilization. It has been shown that there is misconception when dealing with FPGAs when it comes to FIR filter as compared to ASICs.

Place, publisher, year, edition, pages
2018. , p. 31
Keywords [en]
DSP
National Category
Signal Processing
Identifiers
URN: urn:nbn:se:liu:diva-152126OAI: oai:DiVA.org:liu-152126DiVA, id: diva2:1256720
Subject / course
Electrical Engineering
Presentation
2018-09-20, Algoritmen, Linköping, 10:00 (Swedish)
Supervisors
Examiners
Available from: 2018-10-30 Created: 2018-10-17 Last updated: 2018-10-30Bibliographically approved

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CiteExportLink to record
Permanent link

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Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf