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Enhancing Compiler-Driven HDL Design withAutomatic Waveform Analysis
Linköping University, Faculty of Science & Engineering. Linköping University, Department of Electrical Engineering, Computer Engineering.ORCID iD: 0000-0001-7089-9697
Johannes Kepler University.ORCID iD: 0000-0002-2571-1058
Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.ORCID iD: 0000-0003-3470-3911
Johannes Kepler University.ORCID iD: 0000-0002-1490-6175
2023 (English)In: Forum on Specification, Verification and Design Languages, FDL, IEEE conference proceedings, 2023Conference paper, Published paper (Refereed)
Abstract [en]

The time-to-market of a new product is one of its most crucial factors for success, therefore, reducing this time is of utter importance. However, this reduction must not come at the expense of a less thorough development process. This paper presents a compiler-driven approach for automatically analyzing metrics such as transaction delays or bus throughput on simulation waveforms of projects developed in the Spade Hardware Description Language (HDL). By utilizing the Spade compiler’s knowledge about design internals, an automatic analysis of the waveforms created during simulation is possible using the Waveform Analysis Language (WAL). Analysis programs can be bundled with Spade projects or libraries, such that they are automatically detected by Spade and can be reused by other projects using simple annotations. We call these bundled WAL programs analysis passes, since they fit into the Spade workflow and provide thorough analysis at no additional cost to the users of these libraries. In a detailed description, we present how new analysis passes can be defined using the example of a data streaming interface. Additionally, we highlight the possibilities of analysis passes in two case studies, including Finite State Machine (FSM) and Wishbone protocol analysis.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2023.
Keywords [en]
Performance Analysis, Hardware Description Languages, Debugging
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:liu:diva-209367DOI: 10.1109/FDL59689.2023.10272204OAI: oai:DiVA.org:liu-209367DiVA, id: diva2:1912066
Conference
Forum on Specification, Verification and Design Languages, FDL
Available from: 2024-11-11 Created: 2024-11-11 Last updated: 2024-11-11

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Publisher's full texthttps://ieeexplore.ieee.org/document/10272204

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Skarman, FransGustafsson, Oscar

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CiteExportLink to record
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  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
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Language
  • de-DE
  • en-GB
  • en-US
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  • Other locale
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Output format
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