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An Integrated System-Level Design for Testability Methodology
Linköpings universitet, Institutionen för datavetenskap, ESLAB - Laboratoriet för inbyggda system. Linköpings universitet, Tekniska högskolan.
2000 (Engelska)Doktorsavhandling, monografi (Övrigt vetenskapligt)
Abstract [en]

HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems.

The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the total test cost. The objective is achieved by developing several new methods to help the designers to analyze the testability and improve it as well as to perform test scheduling and test access mechanism design.

The developed methods have been integrated into a systematic methodology for the testing of system-on-chip. The methodology consists of several efficient techniques to support test scheduling, test access mechanism design, test set selection, test parallelization and test resource placement. An optimization strategy has also been developed which minimizes test application time and test access mechanism cost, while considering constraints on tests, power consumption and test resources.

Several novel approaches to analyzing the testability of a system at behavioral level and register-transfer level have also been developed. Based on the analysis results, difficult-to-test parts of a design are identified and modified by transformations to improve testability of the whole system.

Extensive experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodology and techniques. The experimental results show clearly the advantages of considering testability in the early design stages at the system level.

Ort, förlag, år, upplaga, sidor
Linköping: Linköping University Electronic Press, 2000. , s. 282
Serie
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 660
Nyckelord [en]
Digital systems, Test design, System-on-chip, Hardware, Systems design, Testing, Dissertations
Nyckelord [sv]
Hårdvara, Systemutveckling, Testning, Databehandling Systemutveckling
Nationell ämneskategori
Systemvetenskap, informationssystem och informatik
Identifikatorer
URN: urn:nbn:se:liu:diva-4932ISBN: 91-7219-890-7 (tryckt)OAI: oai:DiVA.org:liu-4932DiVA, id: diva2:20818
Disputation
2000-12-19, Estraden, Hus E, Campus Valla, Linköpings universitet, Linköping, 13:15 (Engelska)
Handledare
Tillgänglig från: 2001-01-21 Skapad: 2001-01-21 Senast uppdaterad: 2018-01-13Bibliografiskt granskad

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fulltext(1741 kB)1913 nedladdningar
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Personposter BETA

Larsson, Erik

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Av författaren/redaktören
Larsson, Erik
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ESLAB - Laboratoriet för inbyggda systemTekniska högskolan
Systemvetenskap, informationssystem och informatik

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Totalt: 1913 nedladdningar
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