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A Front End to a Java Based Environment for the Design of Embedded Systems
Linköpings universitet, Tekniska högskolan. Linköpings universitet, Institutionen för datavetenskap, ESLAB - Laboratoriet för inbyggda system.
Linköpings universitet, Tekniska högskolan. Linköpings universitet, Institutionen för datavetenskap, ESLAB - Laboratoriet för inbyggda system.
Linköpings universitet, Tekniska högskolan. Linköpings universitet, Institutionen för datavetenskap, ESLAB - Laboratoriet för inbyggda system.
2001 (engelsk)Inngår i: 4th IEEE DDECS Workshop,2001, 2001, s. 71-78Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

During the design of embedded systems, at a certain point, the specification has to be transformed into an internal design representation. From that representation it should be possible to further perform system partitioning, mapping and scheduling. This report provides a framework to specify a system in Java and a way to automatically translate that specification into an internal design representation. That design representation is the Conditional Process Graph which captures both the data and the control flow at process level.

sted, utgiver, år, opplag, sider
2001. s. 71-78
Emneord [en]
embedded systems, internal design representaion, partitioning, mapping, scheduling, Java
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-23378Lokal ID: 2817OAI: oai:DiVA.org:liu-23378DiVA, id: diva2:243692
Konferanse
4th IEEE Design and Diagnosis of Electronic Circuit and Systems Workshop (DDECS), 18-20 April 2001, Gyor, Hungary
Tilgjengelig fra: 2009-10-07 Laget: 2009-10-07 Sist oppdatert: 2018-01-13

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http://www.ida.liu.se/labs/eslab/publications/pap/db/ddecs01.pdf

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