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Implementation of fast bit-serial lattice wave digital filters
Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
n/a.
Linköpings universitet, Institutionen för systemteknik, Elektroniksystem. Linköpings universitet, Tekniska högskolan.
1994 (engelsk)Inngår i: Proc. 1994 IEEE Int. Symp. on Circuits and Systems, ISCAS'94, 1994, s. II-113-II-116Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

In this paper we discuss the design and implementation of fixed-function wave digital lattice filters. We demonstrate by means of an example that a sampling frequency of more than 130 MHz can be achieved by using bit-serial arithmetic. The proposed approach leads to very fast filters with low power consumption and a minimum requirement of chip area. Further, we show that the iteration period bound by Renfors et al. (1981) often can be lowered by applying numerical equivalence transformations to the signal-flow graph. The proposed implementation technique can easily be extended to higher-order bireciprocal and non-bireciprocal lattice filters as well as other types of filters.

sted, utgiver, år, opplag, sider
1994. s. II-113-II-116
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URN: urn:nbn:se:liu:diva-50880DOI: 10.1109/ISCAS.1994.408918ISBN: 0-7803-1915-X (tryckt)OAI: oai:DiVA.org:liu-50880DiVA, id: diva2:272293
Tilgjengelig fra: 2009-10-15 Laget: 2009-10-15 Sist oppdatert: 2009-10-17

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