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Scheduling Tests for Stacked 3D Chips under Power Constraints
SenGupta, Breeta
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
Ingelsson, Urban
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
Larsson, Erik
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
2010 (English)
In:
Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
, 2010
Conference paper, Published paper (Other academic)
Place, publisher, year, edition, pages
2010.
National Category
Engineering and Technology
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URN:
urn:nbn:se:liu:diva-59602
OAI: oai:DiVA.org:liu-59602
DiVA, id:
diva2:352625
Available from:
2010-09-21
Created:
2010-09-21
Last updated:
2010-09-28
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Authority records BETA
SenGupta, Breeta
Ingelsson, Urban
Larsson, Erik
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Ingelsson, Urban
Larsson, Erik
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ESLAB - Embedded Systems Laboratory
The Institute of Technology
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harvard1
ieee
modern-language-association-8th-edition
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apa
harvard1
ieee
modern-language-association-8th-edition
vancouver
oxford
Other style
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de-DE
en-GB
en-US
fi-FI
nn-NO
nn-NB
sv-SE
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de-DE
en-GB
en-US
fi-FI
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