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EBRAM - Extending the BlockRAMs in FPGAs to support caches and hash tables inan efficient manner
Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.ORCID-id: 0000-0002-0111-2384
2012 (engelsk)Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.

sted, utgiver, år, opplag, sider
IEEE Computer Society, 2012. s. 242-242
Emneord [en]
Cache, FPGA, BlockRAM
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-80348DOI: 10.1109/FCCM.2012.52ISI: 000309191400041ISBN: 978-1-4673-1605-7 (tryckt)OAI: oai:DiVA.org:liu-80348DiVA, id: diva2:546551
Konferanse
IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, April 29 - May 1 2012, Toronto, ON, Canada
Tilgjengelig fra: 2012-08-23 Laget: 2012-08-23 Sist oppdatert: 2015-02-18

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