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Configuration-based architecture for high speed and general-purpose protocol processing
Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
Linköpings universitet, Institutionen för systemteknik, Elektroniska komponenter. Linköpings universitet, Tekniska högskolan.
1999 (engelsk)Inngår i: 1999 IEEE Workshop on Signal Processing Systems, 1999. SiPS 99., 1999, s. 540-547Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

A novel configuration based general-purpose protocol processor is proposed. It can perform much faster protocol processing compared to general-purpose processors. As it is configuration based, different protocols can be configured for different protocols and different applications. The configurability makes compatibility possible, it also processes protocols very fast on the fly. The proposed architecture can be used as a platform or an accelerator for network-based applications

sted, utgiver, år, opplag, sider
1999. s. 540-547
HSV kategori
Identifikatorer
URN: urn:nbn:se:liu:diva-100980DOI: 10.1109/SIPS.1999.822360OAI: oai:DiVA.org:liu-100980DiVA, id: diva2:664625
Konferanse
SIPS 1999, 20-22 October. Taipei, Taiwan
Tilgjengelig fra: 2013-11-15 Laget: 2013-11-15 Sist oppdatert: 2013-11-15
Inngår i avhandling
1. A Programmable Network Interface Accelerator
Åpne denne publikasjonen i ny fane eller vindu >>A Programmable Network Interface Accelerator
2003 (engelsk)Licentiatavhandling, med artikler (Annet vitenskapelig)
Abstract [en]

The bandwidth and number of users in computer networks are rapidly growing today. The need for added functionality in the network nodes is also increasing. The requirements on the processing devices get harder and harder to meet using traditional hardware architectures. Hence, a lot of effort is currently focused on finding new improved hardware architectures.

In the emerging research area of programmable network interfaces, there exist many hardware platform proposals. Most of them aim for router applications but not so many for terminals. This thesis explores a number of different router design alternatives and architectural concepts. The concepts have been examined to see which apply also to terminal designs.

A novel terminal platform solution is proposed in this thesis. The platform is accelerated using a programmable protocol processor. The processor uses a number of different dedicated hardware blocks, that operates in parallel, to accelerate the platform. The hardware blocks have been selected and specified to fulfill the requirements set by a number of common network protocols. To do this, the protocol processing procedure has been investigated and divided into processing tasks. The different tasks have been explored to see which are suitable for hardware acceleration and which should be processed in other parts of the platform.

The dedicated datapath, simplified control, and minimal usage of data buffers makes the proposed processor attractive from a power perspective. Further it accelerates the platform so that high speed operation is enabled.

sted, utgiver, år, opplag, sider
Linköping: Uniserv, 2003. s. 63
Serie
Linköping Studies in Science and Technology. Thesis, ISSN 0280-7971 ; 998
HSV kategori
Identifikatorer
urn:nbn:se:liu:diva-33282 (URN)19282 (Lokal ID)91-7373-580-9 (ISBN)19282 (Arkivnummer)19282 (OAI)
Tilgjengelig fra: 2009-10-09 Laget: 2009-10-09 Sist oppdatert: 2013-11-15

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