liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Implementation of an SDR in Verilog
Linköping University, Department of Electrical Engineering, Communication Systems.
2016 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

This report presents an implementation of the software part in a software definedradio. The radio is not entirely implemented in software and therefore there arecertain limitations on the received signal. The parts implemented are oscillator,decimation filter, carrier synchronization, time synchronization, package detection,and demodulation. Different algorithms were tested for the different partsto measure the power consumption. To understand how the number of bits usedto represent the signal affects the power consumption, the number of bits wasreduced from 20 bits to 10 bits. This reduction reduced the power consumptionfrom 2.57mW to 1.89mW. A small change in the choice of algorithms was thenmade which reduced the power consumption to 1.86mW. Then the clock rate wasreduced for some parts of the system which reduced the power consumption to1.05mW.

Place, publisher, year, edition, pages
2016. , p. 65
Keywords [en]
SDR, software defined radio, energy consumption, power consumption, Verilog
National Category
Communication Systems
Identifiers
URN: urn:nbn:se:liu:diva-132325ISRN: LiTH-ISY-EX–16/5001–SEOAI: oai:DiVA.org:liu-132325DiVA, id: diva2:1044579
External cooperation
Syntronic
Subject / course
Communcation
Supervisors
Examiners
Available from: 2016-12-07 Created: 2016-11-01 Last updated: 2016-12-07Bibliographically approved

Open Access in DiVA

Implementation of an SDR in Verilog(899 kB)328 downloads
File information
File name FULLTEXT02.pdfFile size 899 kBChecksum SHA-512
0738a78b90cfd7c06c0d5d764ffcb6f3f68d4be6d97215d2306410188de66b0210ecf384fa9835d95678a8baaffad94495492a8b7105073f5132689045bdbd37
Type fulltextMimetype application/pdf

Search in DiVA

By author/editor
Skärpe, Anders
By organisation
Communication Systems
Communication Systems

Search outside of DiVA

GoogleGoogle Scholar
Total: 328 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 1725 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf