Mixed-Signal Design Using Digital CAD
2016 (English)In: Proceedings IEEE Computer Society Annual Symposium on VLSI ISVLSI 2016, 2016, 6-11 p.Conference paper (Refereed)
The paper investigates the use of the existing CAD framework for digital circuit synthesis to design and synthesize a select set of mixed-signal functions like analog-to-digital and digital-to-analog conversions. This approach leads to fast and low cost design of technology portable system-on-chip solutions with analog interfaces. Some circuit examples for implementation of data conversion using digital circuits are discussed, leveraging on time-domain signal processing. Some of the signal corruption mechanisms in time-domain signal processing systems are considered in order to suggest adaptations to the existing digital design flow for the synthesis of mixed-signal circuits. As an example to show that high performance data conversion circuits can be realized using low accuracy general purpose components, an ADC is designed and synthesized with the vendor supplied standard cell library in a 65 nm CMOS process. Spectre simulation results show the feasibility of employing a digital CAD framework to synthesize high performance mixed-signal circuits, by applying time-domain signal processing.
Place, publisher, year, edition, pages
2016. 6-11 p.
, IEEE Computer Society Annual Symposium on VLSI, ISSN 2159-3477
CAD;analogue-digital conversion;digital-analogue conversion;electronic engineering computing;integrated circuit design;mixed analogue-digital integrated circuits;signal processing;system-on-chip;time-domain analysis;ADC design;CAD framework;CMOS process;Spectre simulation;analog interfaces;analog-to-digital conversion;corruption mechanisms;data conversion;digital CAD framework;digital circuit synthesis;digital design flow;digital-to-analog conversion;high-performance data conversion circuits;mixed-signal circuit synthesis;mixed-signal design;mixed-signal functions;size 65 nm;system-on-chip design;time-domain signal processing;time-domain signal processing systems;vendor supplied standard cell library;Delays;Digital circuits;Inverters;Logic gates;Signal processing;Standards;Time-domain analysis;ADC;CAD;DAC;Mixed-signal;VHDL;Verilog;all-digital;analog;analog-to-digital;comparator;design flow;digital;digital-to-analog;opamp;place-and-route;signal processing;synthesis;synthesizable;time-domain;time-mode
Electrical Engineering, Electronic Engineering, Information Engineering Computer Engineering
IdentifiersURN: urn:nbn:se:liu:diva-132788DOI: 10.1109/ISVLSI.2016.79ISI: 000389508400002ISBN: 9781467390392 (onlineISBN: 9781467390408 (PoD)OAI: oai:DiVA.org:liu-132788DiVA: diva2:1049561
IEEE Computer Society Annual Symposium on VLSI, 11-13 July 2016, Pittsburgh, Pennsylvania, USA