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Schedulability and Memory Interference Analysis of Multicore Preemptive Real-time Systems
Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering. (RTSLab)
Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering. (RTSLab)
2017 (English)In: 8th ACM/SPEC International Conference on Performance Engineering. L’Aquila Italy, April 2017, 2017Conference paper, (Refereed)
Abstract [en]

Today's embedded systems demand increasing computingpower to accommodate the ever-growing software functionality.Automotive and avionic systems aim to leverage thehigh performance capabilities of multicore platforms, but arefaced with challenges with respect to temporal predictability.Multicore designers have achieved much progress onimprovement of memory-dependent performance in cachingsystems and shared memories in general. However, havingapplications running simultaneously and requesting the accessto the shared memories concurrently leads to interference.The performance unpredictability resulting from interferenceat any shared memory level may lead to violationof the timing properties in safety-critical real-time systems.In this paper, we introduce a formal analysis framework forthe schedulability and memory interference of multicore systemswith shared caches and DRAM. We build a multicoresystem model with a ne grained application behavior givenin terms of periodic preemptible tasks, described with explicitread and write access numbers for shared caches andDRAM. We also provide a method to analyze and recommendcandidates for task-to-core reallocation with the goalto nd schedulable congurations if a given system is notschedulable. Our model-based framework is realized usingUppaal and has been used to analyze a case study

Place, publisher, year, edition, pages
2017.
Keyword [en]
Schedulability, memory interference, processor utilization, multicore systems, task migration, model checking
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-134564DOI: 10.1145/3030207.3030233OAI: oai:DiVA.org:liu-134564DiVA: diva2:1074817
Conference
8th ACM/SPEC International Conference on Performance Engineering L’Aquila Italy, April 2017
Projects
NFFP6
Funder
VINNOVA
Available from: 2017-02-16 Created: 2017-02-16 Last updated: 2017-03-29Bibliographically approved

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CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf