A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices
2017 (English)In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems, ISSN 1063-8210, E-ISSN 1557-9999, Vol. 25, no 1, 375-379 p.Article in journal (Refereed) Published
This brief presents a novel 4096-point radix-4 memory-based fast Fourier transform (FFT). The proposed architecture follows a conflict-free strategy that only requires a total memory of size N and a few additional multiplexers. The control is also simple, as it is generated directly from the bits of a counter. Apart from the low complexity, the FFT has been implemented on a Virtex-5 field programmable gate array (FPGA) using DSP slices. The goal has been to reduce the use of distributed logic, which is scarce in the target FPGA. With this purpose, most of the hardware has been implemented in DSP48E. As a result, the proposed FPGA is efficient in terms of hardware resources, as is shown by the experimental results.
Place, publisher, year, edition, pages
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC , 2017. Vol. 25, no 1, 375-379 p.
Fast Fourier transform (FFT); field programmable gate array (FPGA); memory-based architecture; radix-4; VLSI
IdentifiersURN: urn:nbn:se:liu:diva-136192DOI: 10.1109/TVLSI.2016.2567784ISI: 000394591600031OAI: oai:DiVA.org:liu-136192DiVA: diva2:1086602
Funding Agencies|Swedish ELLIIT Program2017-04-032017-04-032017-04-21