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ASIC Design Exploration for DSP and FEC of 400-Gbit/s Coherent Data-Center Interconnect Receivers
Chalmers University of Technology, Gothenburg, Sweden.ORCID iD: 0000-0001-5921-4642
Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.ORCID iD: 0000-0003-3470-3911
Linköping University, Department of Electrical Engineering, Computer Engineering. Linköping University, Faculty of Science & Engineering.
Chalmers University of Technology, Gothenburg, Sweden.
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2020 (English)In: Optical Fiber Communication Conference (OFC) 2020, Optical Society of America, 2020, article id Th2A.38Conference paper, Published paper (Refereed)
Abstract [en]

We perform exploratory ASIC design of key DSP and FEC units for 400-Gbit/s coherent data-center interconnect receivers. In 22-nm CMOS, the considered units together dissipate 5 W, suggesting implementation feasibility in power-constrained form factors.
Place, publisher, year, edition, pages
Optical Society of America, 2020. article id Th2A.38
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Communication Systems Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-170863DOI: 10.1364/OFC.2020.Th2A.38ISI: 000676346200101ISBN: 9781943580712 (electronic)ISBN: 9781728167626 (print)OAI: oai:DiVA.org:liu-170863DiVA, id: diva2:1484035
Conference
Optical Fiber Communications Conference and Exhibition (OFC), San Diego, California, United States, 8–12 March, 2020
Available from: 2020-10-27 Created: 2020-10-27 Last updated: 2024-08-26Bibliographically approved

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Gustafsson, Oscar

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Fougstedt, ChristofferGustafsson, OscarBae, CheolyongLarsson-Edefors, Per
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