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BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature
Tongji Univ, Peoples R China.
Tongji Univ, Peoples R China.
Linköping University, Department of Computer and Information Science, Software and Systems. Linköping University, Faculty of Science & Engineering.
Chinese Acad Sci, Peoples R China; Univ Chinese Acad Sci, Peoples R China.
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2022 (English)In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems, ISSN 1063-8210, E-ISSN 1557-9999, Vol. 30, no 11, p. 1677-1690Article in journal (Refereed) Published
Abstract [en]

This article presents a bounded model checking (BMC)-based temperature-aware software-based self-testing (SBST) technique to test worst case delay faults within the highest temperature range. The BMC-based SBST method first defines the sequential constraint. It develops a sequentially constrained automatic test pattern generation (ATPG) to ensure that the generated delay test patterns can emerge in functional mode. It then uses the processors multiple-level information to reduce the model complexity, avoid aborts due to time-outs during the BMC process, and generate test programs automatically. A temperature-aware SBST method has then been developed to ensure that the test temperature is within the specified range and test the worst case delays under high temperature. Experimental results demonstrate that the proposed technique achieves an extremely high coverage for delay faults and effectively avoids yield loss caused by the overtesting problem. Its test quality also outperforms that of the existing methods. The generated SBST programs are successful and efficient in testing worst case delay faults under high temperature.

Place, publisher, year, edition, pages
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC , 2022. Vol. 30, no 11, p. 1677-1690
Keywords [en]
Delays; Circuit faults; Temperature distribution; Registers; Logic gates; Symbols; Manufacturing; Bounded model checking (BMC); software-based self-testing (SBST); temperature-aware testing; worst case delay faults
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:liu:diva-187362DOI: 10.1109/TVLSI.2022.3186946ISI: 000829071800001OAI: oai:DiVA.org:liu-187362DiVA, id: diva2:1688797
Note

Funding Agencies|National Key Research and Development Program of China [2020YFB1600201]; National Natural Science Foundation of China (NSFC) [61974105, 62090024, U20A20202]; Zhejiang Laboratory [2021KC0AB01]

Available from: 2022-08-19 Created: 2022-08-19 Last updated: 2023-03-28Bibliographically approved

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