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Design av ett decimeringsfilter med låg effektförbrukning Design of a decimation filter with low power consumption
Linköping University, Department of Electrical Engineering.
2003 (Swedish)Independent thesis Basic level (professional degree)Student thesis
Abstract [sv]

Implementering av FIR filter kan göras på olika sätt. I detta examensarbete har två olika varianter beskrivits med hjälp av VHDL, syntetiserats, simulerats och sedan jämförts med avseende på effektförbrukning.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2003. , 31 p.
Series
LiTH-ISY-Ex, 3447
Keyword [en]
Electronics, Direkt form, Distribuerad aritmetik, VHDL, Låg effekt.
Keyword [sv]
Elektronik
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-1764OAI: oai:DiVA.org:liu-1764DiVA: diva2:19090
Uppsok
teknik
Available from: 2003-08-15 Created: 2003-08-15

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
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  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
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  • asciidoc
  • rtf