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FIFO-kostruktion baserat på ett enkel-ports SRAM
Linköping University, Department of Electrical Engineering.
2003 (Swedish)Independent thesis Basic level (professional degree)Student thesisAlternative title
FIFO-construction based on a single-port SRAM (English)
Abstract [sv]

Vid implementeringar av FIFO-arkitekturer har asynkrona FIFO-konstruktioner använts. Denna lösningsmetod har visat sig innehålla en del brister vid tillämpning på höghastighets system, vilket ledde till att synkrona FIFOn började ersätta asynkrona FIFOn.

Den synkrona arkitekturen har samma funktonalitet som de asynkrona typerna med fördelar som högre hastighet och enklare gränssnitt.

I rapporten har olika FIFO-konstruktioner behandlats och jämförelser har gjorts mellan synkrona och asynkrona arkitekturer. Det vid ISY konstruerade SRAM-minnet har sedan avgjort vilken typ av FIFO-arkitektur som varit bäst lämpad för implementering.

Det implementerade FIFO-minnet ordnar indata- och utdataflöden till ett enkelports SRAM-minne på 256 ord med 16 bitar per ord.

Abstract [en]

Previous implementations of FIFO-architectures has often been asynchronous FIFO-constructions. This method has some limitations in high speed systems. Instead synchronous FIFOs has more and more replaced asynchronous FIFOs.

The synchronous architecture has the same features as the asynchronous but with advantages such as higher speed and simplified interface.

In the report different types of FIFO-constructions has been studied and comparison between synchronous and asynchronous architectures has been done. The memory unit developed by ISY decided which FIFO-architecture that were best suited for the implementation.

The implemented FIFO-memory arrange in- and outdataflow to a single-port SRAM memory containing 256 words with 16 bits per word.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2003. , 27 p.
Series
LiTH-ISY-Ex-ET, 0258
Keyword [en]
Electronics, FIFO, SRAM, synkron, asynkron, adressräknare, Data-multiplexer, arkitektur FIFO, SRAM, synchronous, asychronous, addresscounter, Data-multiplexer, architecture
Keyword [sv]
Elektronik
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-2008OAI: oai:DiVA.org:liu-2008DiVA: diva2:19336
Uppsok
teknik
Available from: 2003-10-13 Created: 2003-10-13

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CiteExportLink to record
Permanent link

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Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf