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Low-density Parity-Check decoding Algorithms
Linköping University, Department of Electrical Engineering.
2004 (English)Independent thesis Basic level (professional degree)Student thesisAlternative title
Low-density Parity-Check avkodare algoritm (Swedish)
Abstract [en]

Recently, low-density parity-check (LDPC) codes have attracted much attention because of their excellent error correcting performance and highly parallelizable decoding scheme. However, the effective VLSI implementation of and LDPC decoder remains a big challenge and is a crucial issue in determining how well we can exploit the benefits of the LDPC codes in the real applications. In this master thesis report, following a error coding background, we describe Low-Density Parity-Check codes and their decoding algorithm, and also requirements and architectures of LPDC decoder implementations.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2004. , 49 p.
LiTH-ISY-Ex, 3529
Keyword [en]
Electronics, LDPC, Low-density parity-check codes, channel coding, FEC, iterative algorithm, Gallager, message-passing algorithm, belief propagation algorithm,
Keyword [sv]
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:liu:diva-2160OAI: diva2:19490
Available from: 2004-03-01 Created: 2004-03-01

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