Capacitive Crosstalk Effects on On-Chip Interconnect Latencies and Data-Rates
Independent thesis Basic level (professional degree)Student thesisAlternative title
Effekter av kapacitiv överhörning på fördröjning och datahastighet hos förbindelser på chip (Swedish)
This thesis work investigates the effects of crosstalk on on-chip interconnects. We use optimal repeater insertion as a reference and derive analytical expressions for signal latency, maximum data-rate and power consumption. Through calculations and simulations we show that despite large uncertainties in arrival time of a signal that is subject to crosstalk, we are able to make predictions about the maximum data-rate on a bus. We also show that data-rates can exceed the classical limit of the latency inverted by using wave pipelining. To increase the data-rate, we can increase the number of repeaters to a limit, at the cost of additional latency and power. Savings in power consumption can be achieved by using fewer repeaters, paying in latency and data-rate. Through fewer repeaters, the top metal layer shows better performance in all investigated aspects.
Place, publisher, year, edition, pages
Institutionen för systemteknik , 2005.
Electronics, on-chip interconnect, crosstalk, data-rate, latency, power consumption, Miller capacitance
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-2675ISRN: LITH-ISY-EX--05/3617--SEOAI: oai:DiVA.org:liu-2675DiVA: diva2:20016