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Implementation of a Scheduling and Allocation Algorithm for Hardware Evaluation
Linköping University, Department of Electrical Engineering.
2005 (English)Independent thesis Basic level (professional degree)Student thesis
Abstract [en]

In this thesis, an intuitive approach to determine scheduling and allocation of a behavioral algorithm defined by a netlist is presented. In this approach, scheduling is based on a weighted list scheduling where operations have the longest critical path are scheduled first. The component allocations are resorted to the PDCPA algorithm which focus on making efficient and correct clusters for hardware reuse problem. Several constraints are used in order to ensure the causality of processes and prevent conflicts of hardware components. This approach can give the total number of control steps and the number of registers and multiplexers in detail. Hence, designers obtain useful information from it and can make trade-offs between different resource conditions.

The program is implemented in MATLAB programming environment and provides parts of behavioral synthesis to facilitate the whole synthesis procedure.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2005.
Keyword [en]
Electronics, PDCPA, Scheduling, Allocation, Behavioral Synthesis, Evaluation, Hardware reuse
Keyword [sv]
Elektronik
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-2901ISRN: LITH-ISY-EX--05/3754--SEOAI: oai:DiVA.org:liu-2901DiVA: diva2:20244
Uppsok
teknik
Available from: 2005-06-01 Created: 2005-06-01

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CiteExportLink to record
Permanent link

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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf