liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Utvärdering av en FPGA för rymdbruk
Linköping University, Department of Science and Technology.
Linköping University, Department of Science and Technology.
2005 (Swedish)Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesisAlternative title
Evaluation of an FPGA for space applications (English)
Abstract [en]

A new FPGA suitable for space applications has just reached the market. To investigate whether there are any possible flaws or limitations similar to those previously seen on FPGAs, an evaluation has to be done. This master thesis contains the evaluation of this new radhard FPGA with focus on possible design limitations and package related electrical phenomena.Areas evaluated: Ground-/VDD bounce, Cross talk, Rise time sensitivit, Power cycling, Power consumption, Place and route tool, Radiation hardnessThis report contains all steps in the evaluation. From method to measurements, comparisons, theory, results and conclusions. In the evaluation work, special effort has been made to develop designs that really stress the FPGA to find potential problems. All problems found are dealt with in this report.Results: Ground-/VDD bounce measurements showed that devices using a fast slew rate resulted in TTL-level violation. However, by separating sensitive signals and SSOs in different I/O banks it is possible to work around the problem. Cross talk measurements has shown that the phenomena causes problems when using a long rise time input with toggling outputs placed next to the signal. Power cycling did not result in any alarming inrush currents. Regular power up showed an unwanted behaviour with pulses on all I/Os right before power on reset kicked in. When comparing the tool value with measurements regarding power consumption it was clear that it differed as much as 40-50%. The FPGA consumes 40-50% more power than what the power calculator tool estimates.

Place, publisher, year, edition, pages
Institutionen för teknik och naturvetenskap , 2005. , 92 p.
Keyword [en]
Electronics, FPGA, RadHard, Ground bounce, Vdd bounce, Cross talk, Evaluation
Keyword [sv]
Elektronik
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-2949ISRN: LITH-ITN-ED-EX--05/002--SEOAI: oai:DiVA.org:liu-2949DiVA: diva2:20292
Uppsok
teknik
Supervisors
Examiners
Available from: 2008-09-22 Created: 2008-09-22Bibliographically approved

Open Access in DiVA

fulltext(2236 kB)453 downloads
File information
File name FULLTEXT01.pdfFile size 2236 kBChecksum
Type fulltextMimetype application/pdf

By organisation
Department of Science and Technology
Other Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar
Total: 453 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 159 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf