liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
An Integrated System-Level Design for Testability Methodology
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
2000 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design at high abstraction levels due to the increasing complexity of digital systems.

The main objective of this thesis is to address test problems faced by the designer at the system level. Considering the testability issues at early design stages can reduce the test problems at lower abstraction levels and lead to the reduction of the total test cost. The objective is achieved by developing several new methods to help the designers to analyze the testability and improve it as well as to perform test scheduling and test access mechanism design.

The developed methods have been integrated into a systematic methodology for the testing of system-on-chip. The methodology consists of several efficient techniques to support test scheduling, test access mechanism design, test set selection, test parallelization and test resource placement. An optimization strategy has also been developed which minimizes test application time and test access mechanism cost, while considering constraints on tests, power consumption and test resources.

Several novel approaches to analyzing the testability of a system at behavioral level and register-transfer level have also been developed. Based on the analysis results, difficult-to-test parts of a design are identified and modified by transformations to improve testability of the whole system.

Extensive experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodology and techniques. The experimental results show clearly the advantages of considering testability in the early design stages at the system level.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press, 2000. , 282 p.
Series
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 660
Keyword [en]
Digital systems, Test design, System-on-chip, Hardware, Systems design, Testing, Dissertations
Keyword [sv]
Hårdvara, Systemutveckling, Testning, Databehandling Systemutveckling
National Category
Information Science
Identifiers
URN: urn:nbn:se:liu:diva-4932ISBN: 91-7219-890-7 (print)OAI: oai:DiVA.org:liu-4932DiVA: diva2:20818
Public defence
2000-12-19, Estraden, Hus E, Campus Valla, Linköpings universitet, Linköping, 13:15 (English)
Supervisors
Available from: 2001-01-21 Created: 2001-01-21 Last updated: 2012-01-24Bibliographically approved

Open Access in DiVA

fulltext(1741 kB)1859 downloads
File information
File name FULLTEXT01.pdfFile size 1741 kBChecksum SHA-1
04433776979e66f632fa6152eb620223f4f09526cc8ba536353b507c48bee91d334fd44a
Type fulltextMimetype application/pdf

Authority records BETA

Larsson, Erik

Search in DiVA

By author/editor
Larsson, Erik
By organisation
ESLAB - Embedded Systems LaboratoryThe Institute of Technology
Information Science

Search outside of DiVA

GoogleGoogle Scholar
Total: 1859 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

isbn
urn-nbn

Altmetric score

isbn
urn-nbn
Total: 890 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf