Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters
2009 (English)In: IEEE Transactions on Circuits and Systems I-Regular Papers, ISSN 1549-8328, Vol. 56, no 3, 509-518 p.Article in journal (Refereed) Published
A very important limitation of high-speed analog-todigital converters (ADCs) is their power dissipation. ADC power dissipation has been examined several times, mostly empirically. In this paper, we present an attempt to estimate a lower bound for the power of ADCs, based on first principles and using pipeline and flash architectures as examples. We find that power dissipation of high-resolution ADCs is bound by noise, whereas technology is the limiting factor for low-resolution devices. Our model assumes the use of digital error correction, but we also study an example on the power penalty due to matching requirements. A comparison with published experimental data indicates that the best ADCs use about 50 times the estimated minimum power. Two published ADCs are used for a more detailed comparison between the minimum bound and todays designs.
Place, publisher, year, edition, pages
2009. Vol. 56, no 3, 509-518 p.
Analog-digital conversion, CMOS analog integrated circuits, high-speed electronics, power demand
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-17615DOI: 10.1109/TCSI.2008.2002548OAI: oai:DiVA.org:liu-17615DiVA: diva2:210911