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Implementation of a Gigabit IP router on an FPGA platform
Linköping University, Department of Electrical Engineering.
2005 (English)Independent thesis Advanced level (degree of Magister), 20 points / 30 hpStudent thesis
Abstract [en]

The computer engineering group at Linköping University has parts of their research dedicated to networks-on-chip and components used in network components and terminals. This research has among others resulted in the SoCBUS NOC and a flow based network protocol processor. The main objective of this project was to integrate these components into an IP router with two or more Gigabit Ethernet interfaces.

A working system has been designed and found working. It consists of three main components, the input module, the output module and a packet buffer. Due to the time constraint and the size of the project the packet buffer could not be designed to be as efficient as possible, thus reducing the overall performance. The SoCBUS also has negative impact on performance, although this could probably be reduced with a revised system design. If such a project is carried out it could use the input and output modules from this project, which connect to SoCBUS and can easily be integrated with other packet buffers and system designs.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2005. , 53 p.
Keyword [en]
Network on chip, NOC, SocBUS, Router, IP, Ethernet
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:liu:diva-5186ISRN: LiTH-ISY-EX--05/3708--SEOAI: oai:DiVA.org:liu-5186DiVA: diva2:21101
Uppsok
teknik
Supervisors
Examiners
Available from: 2005-12-21 Created: 2005-12-21

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CiteExportLink to record
Permanent link

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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf