On-chip calibration of RF detectors by DC stimuli and artificial neural networks
2008 (English)In: Proceedings of 2008 IEEE Radio Frequency Integrated Circuits Symposium, Piscataway, N.J, USA: IEEE , 2008, 571-574 p.Conference paper (Refereed)
In the nanometer regime, especially the RF and analog circuits exhibit wide parameter variability, and consequently every chip produced needs to be tested. On-chip design for testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, artificial neural networks (ANN) are employed as multivariate regression technique to architect a general RF calibration scheme using DC- instead of RF stimuli. This relaxes the routing requirements on a chip for GHz test signals along with the reduction in test time and cost. The RF detector, a key element of a radio front-end DfT circuitry, designed in 65 nm CMOS is used to demonstrate the calibration scheme.
Place, publisher, year, edition, pages
Piscataway, N.J, USA: IEEE , 2008. 571-574 p.
, IEEE Radio Frequency Integrated Circuits Symposium. Digest of Papers, ISSN 1529-2517
ANN application, On-chip RF detector, RF BIST, RF DfT, RF calibration, RF testing
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-18202DOI: 10.1109/RFIC.2008.4561502ISBN: 978-1-4244-1808-4 (print)ISBN: 978-1-4244-1809-1 (E-ISBN)OAI: oai:DiVA.org:liu-18202DiVA: diva2:216707
IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, USA, June 15-17 2008