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Reconfigurable and Broadband Circuits for Flexible RF Front Ends
Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
2009 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Most of today’s microwave circuits are designed for specific function and special need. There is a growing trend to have flexible and reconfigurable circuits. Circuits that can be digitally programmed to achieve various functions based on specific needs. Realization of high frequency circuit blocks that can be dynamically reconfigured to achieve the desired performance seems to be challenging. However, with recent advances in many areas of technology these demands can now be met.

Two concepts have been investigated in this thesis. The initial part presents the feasibility of a flexible and programmable circuit (PROMFA) that can be utilized for multifunctional systems operating at microwave frequencies. Design details and PROMFA implementation is presented. This concept is based on an array of generic cells, which consists of a matrix of analog building blocks that can be dynamically reconfigured. Either each matrix element can be programmed independently or several elements can be programmed collectively to achieve a specific function. The PROMFA circuit can therefore realize more complex functions, such as filters or oscillators. Realization of a flexible RF circuit based on generic cells is a new concept. In order to validate the idea, two test chips have been fabricated. The first chip implementation was carried out in a 0.2μm GaAs process, ED02AH from OMMICTM. The second chip was implemented in a standard 90nm CMOS process. Simulated and measured results are presented along with some key applications such as low noise amplifier, tunable band pass filter and a tunable oscillator.

The later part of the thesis covers the design and implementation of broadband RF front-ends that can be utilized for multistandard terminals such as software defined radio (SDR). The concept of low gain, highly linear frontends has been presented. For proof of concept two test chips have been implemented in 90nm CMOS technology process. Simulated and measurement results are presented. These RF front-end implementations utilize wideband designs with active and passive mixer configurations.

We have also investigated narrowband tunable LNAs. A dual band tunable LNA MMIC has been fabricated in 0.2μm GaAs process. A self tuning technique has been proposed for the optimization of this LNA.

Place, publisher, year, edition, pages
Link: Linköping University Electronic Press , 2009. , 82 p.
Series
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 1259
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-18512ISBN: 978-91-7393-605-7 (print)OAI: oai:DiVA.org:liu-18512DiVA: diva2:220102
Public defence
2009-08-25, Visionen, Hus B, Campus Valla, Linköpings universitet, Linköping, 13:15 (English)
Opponent
Supervisors
Available from: 2009-05-29 Created: 2009-05-29 Last updated: 2009-05-29Bibliographically approved
List of papers
1. Applications of Programmable Microwave Function Array (PROMFA)
Open this publication in new window or tab >>Applications of Programmable Microwave Function Array (PROMFA)
2007 (English)In: Proceedings of the IEEE European Conference on Circuit Theory and Design (ECCTD 2007), August 26-30, 2007, Seville, Spain, IEEE , 2007, 164 -167 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes the use of programmable microwave function array (PROMFA) for different microwave application. The PROMFA concept is based on an array of generic cells, in which a number of different functions can be realized. Each PROMFA cell is a four-port circuit, that can either be programmed independently or collectively according to a specific need. Specifically, the phase shift capability in a single PROMFA cell, useful for a new type of phase shifter design is discussed. The paper also presents the functionality of this new architecture as a beamforming network. As an example case an active corporate feed network and a tunable recursive filter is demonstrated. Simulated and measured results are presented.

Place, publisher, year, edition, pages
IEEE, 2007
Keyword
Microwave circuits, phase shifters, programmable circuits, active corporate feed network, four-port circuit, generic cells, phase shift capability, programmable microwave function array, tunable recursive filter
National Category
Computer Science
Identifiers
urn:nbn:se:liu:diva-14859 (URN)10.1109/ECCTD.2007.4529562 (DOI)978-1-4244-1341-6 (ISBN)
Available from: 2008-09-26 Created: 2008-09-26 Last updated: 2009-05-29Bibliographically approved
2. A Design Approach for Flexible RF Circuits Using Reconfigurable PROMFA Cells
Open this publication in new window or tab >>A Design Approach for Flexible RF Circuits Using Reconfigurable PROMFA Cells
Show others...
2009 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979Article in journal (Other academic) Submitted
Abstract [en]

This paper presents a design approach for flexible RF circuits using Programmable Microwave Function Array (PROMFA) cells. The concept is based on an array of generic cells that can be dynamically reconfigured. Therefore, the same circuit can be used for various functions e.g. amplifier, tunable filter and tunable oscillator. For proof of concept a test chip has been implemented in 90nm CMOS process. The chip measurement results indicate that a single unit cell amplifier has a typical gain of 4dB with noise figure of 2.65dB at 1.5GHz. The measured input referred 1dB compression point is -8dBm with an IIP3 of +1.1dBm at 1GHz. In a single unit cell oscillator configuration, the oscillator can achieve a wide tuning range of 600MHz to 1.8GHz. The measured phase noise is -94dBc/Hz at an offset frequency of 1MHz for the oscillation frequency of 1.2GHz. A single unit cell oscillator consumes 18mW at 1.2GHz while providing -8dBm power into 50Ω load. In a single unit cell filter configuration, the tunable band pass filter can achieve a reasonable tuning range of 600MHz to 1.2GHz with a typical power consumption of 13mW at 1GHz. A single unit cell has a total chip area of 0.091mm2 including the coupling capacitors.

Keyword
CMOS, flexible circuit, generic PROMFA cells, reconfigurable circuit, tunable oscillator, tunable band pass filter
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-18508 (URN)
Available from: 2009-05-29 Created: 2009-05-29 Last updated: 2017-12-13Bibliographically approved
3. Dual Band Tunable LNA for Flexible RF Front End
Open this publication in new window or tab >>Dual Band Tunable LNA for Flexible RF Front End
2007 (English)In: Proceedings of the IEEE International Bhurban Conference on Applied Sciences & Technology (IBCAST 2007), January 8-11, 2007, Islamabad, Pakistan, IEEE Explore , 2007, 19-22 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a dual band LNA that can be switched between two bands (2.4 GHz & 5.2 GHz) for IEEE 802.1 la/b/g WLAN applications. The LNA is also tunable within each band and the tuning is incorporated by on-chip varactors. The test chip consists of two fully integrated narrow-band tunable LNAs along with SPDT switch. For power saving one LNA can be switched off. The technology process is 0.2 mum GaAs offered by OMMIC. The LNA can achieve a relatively good performance over the two bands as demonstrated by simulation. With a 3V supply, the LNA has a gain of 26.2 dB at 2.4 GHz and 21.8 dB at 5.2 GHz and the corresponding NF varies between 2.07 dB and 1.84 dB, respectively. The LNA has an IIP3 of -7 dBm at 2.4 GHz and -1.6 dBm at 5.2 GHz.

Place, publisher, year, edition, pages
IEEE Explore, 2007
Keyword
Circuit tuning, flexible electronics, gallium arsenide, low noise amplifiers, radiofrequency amplifiers, varactors, wireless LAN
National Category
Computer Science
Identifiers
urn:nbn:se:liu:diva-14860 (URN)10.1109/IBCAST.2007.4379900 (DOI)978-969-8741-04-4 (ISBN)
Available from: 2008-09-26 Created: 2008-09-26 Last updated: 2009-05-29Bibliographically approved
4. A Self-Tuning Technique for Optimization of Dual Band LNA
Open this publication in new window or tab >>A Self-Tuning Technique for Optimization of Dual Band LNA
2008 (English)In: European Wireless Technology Conference (EuWiT), EuMW 2008, October 27-28, 2008, Amsterdam, The Netherlands, IEEE , 2008, 178-181 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a self-tuning technique for optimization of a dual band LNAthat can be used in a flexible RF front-end suitable for IEEE 802.11a/b/g WLANapplications. With this tuning technique the LNA can perform self-calibrationfor the optimal performance. A possible shift in resonance frequency due toprocess and temperature variations can be compensated by this method. Theproposed self-tuning technique is implemented by using a simple RF detector atthe LNA output. Based on the DC value provided by this detector the LNA istuned for a maximum gain through the tuning loop, which incorporates ADC,digital base-band and DAC. We show that the tuning error can be within halfLSB of ADC provided the DAC and ADC resolutions are constraint by aspecified condition. For 4-bit case this value corresponds to a gain error of0.4 dB. The LNA has been implemented in 0.2μm GaAs process offered byOMMICTM. In measurements the LNA achieves a gain of 15.1 dB and 21.6 dBin the upper and lower band, respectively, with corresponding NF of 3.8 dB and2.8 dB. In the lower band the measured IIP3 is -3 dBm and 1dB_CP is -8 dBm.

Place, publisher, year, edition, pages
IEEE, 2008
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-14862 (URN)978-2-87487-008-8 (ISBN)
Available from: 2008-09-26 Created: 2008-09-26 Last updated: 2009-05-29Bibliographically approved
5. Highly Linear Wideband Low Power Current Mode LNA
Open this publication in new window or tab >>Highly Linear Wideband Low Power Current Mode LNA
2008 (English)In: Proceedings from the ICSES'08 - ICSES 2008 International Conference on Signals and Electronic Systems, IEEE , 2008, 73-76 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents design considerations for low power, highly linear currentmode LNAs that can be used for wideband RF front-ends for multistandardapplications. The circuit level simulations of the proposed architecture indicatethat with optimal biasing a high value of IIP3 can be obtained. A comparison ofthree scenarios for optimal bias is presented. Simulation results indicate thatwith the proposed architecture, LNAs may achieve a maximum NF of 3.6 dBwith a 3 dB bandwidth larger than 10 GHz and a best case IIP3 of +17.6 dBmwith 6.3 mW power consumption. The LNAs have a broadband input match of 50Ω. The process is 90nm CMOS and with 1.1V supply the LNAs powerconsumption varies between 6.3 mW and 2.3 mW for the best and the worst caseIIP3, respectively.

Place, publisher, year, edition, pages
IEEE, 2008
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-14863 (URN)10.1109/ICSES.2008.4673361 (DOI)978-83-88309-47-2 (ISBN)978-83-88309-52-6 (ISBN)
Conference
International Conference on Signals and Electronic Systems (ICSES’08), September 14-17, 2008, Krakow, Poland
Available from: 2008-09-26 Created: 2008-09-26 Last updated: 2014-05-15Bibliographically approved
6. A 0.5-6 GHz Low Gain RF Front-End for Low-IF Over-Sampling Receivers in 90nm CMOS
Open this publication in new window or tab >>A 0.5-6 GHz Low Gain RF Front-End for Low-IF Over-Sampling Receivers in 90nm CMOS
Show others...
2009 (English)Manuscript (Other academic)
Abstract [en]

The software defined radio concept has emerged as a feasible solution for future multigand and multistandard receivers. The proposed software defined radio architecture needs a front-end with moderate or low gain, high linearity, and low noise figure. This paper presents the design and measurement results of low gain RF front-end in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transcjonductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match getter than -8dB up to 8GHz. The front-end achieves voltage conversion gain of 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz at 1GHz. The complete front-end consumers 23mW with active chip area of only 0.048mm2.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-18196 (URN)
Available from: 2009-05-11 Created: 2009-05-11 Last updated: 2010-01-14Bibliographically approved
7. A 1.1V 6.2mW, Highly Linear Wideband RF Front-end for Multi-Standard Receivers in 90nm CMOS
Open this publication in new window or tab >>A 1.1V 6.2mW, Highly Linear Wideband RF Front-end for Multi-Standard Receivers in 90nm CMOS
Show others...
2012 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 70, no 1, 79-90 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves high linearity in a wide band (0.5-6GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below -8.8dB up to 6GHz. The measured single sideband noise figure at an LO frequency of 2GHz and an IF of 10MHz is 6.25dB. The front-end achieves a voltage conversion gain of 4.5dB at 1GHz with 3dB bandwidth of more than 6GHz. The measured input referred 1dB compression point is +1.5dBm while the IIP3 is +11.73dBm and the IIP2 is +26.23dBm respectively at an LO frequency of 2GHz. The RF front-end consumes 6.2mW from a 1.1V supply with an active chip area of 0.0856mm2.

Place, publisher, year, edition, pages
SpringerLink, 2012
Keyword
Blocker suppression, common gate (CG), highly linear, low power, multi-standard, software defined radio, wideband front-end
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-18511 (URN)10.1007/s10470-011-9667-9 (DOI)000298604100007 ()
Note
The original status of this article was: Manuscript.Available from: 2009-05-29 Created: 2009-05-29 Last updated: 2017-12-13Bibliographically approved

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