liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Two-Tone PLL  for On-Chip Test In 90nm-Technology
Linköping University, Department of Electrical Engineering.
2009 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

In this report the two-tone PLL circuit intended for on-chip test of RF blocks is presented. The primary application is the third order intermodulation test (TOI), vital for RF front-ends. If the spectral analysis can also be completed by DSP available on the chip or on board, it provides a built in self-test (BiST) which can replace costly test instrumentation (ATE). The advantage of the designed two-tone PLL is that it practically prevents the locking effect while keeping the two oscillation frequencies close. Also by careful design the possible intermodulation distortion of the two-tone stimulus can be avoided.

The two-tone PLL has been designed and verified at the system level using Verilog-A models in Cadence TM. Besides, two building blocks of the PLL were implemented at the circuit level in 90nm CMOS technology. The obtained results are promising in terms of a practical two-tone BiST implementation.

Place, publisher, year, edition, pages
2009. , 75 p.
Keyword [en]
System -On-Chip
National Category
Information Science
Identifiers
URN: urn:nbn:se:liu:diva-18590ISRN: LiTH-ISY--EX--09/4311--SEOAI: oai:DiVA.org:liu-18590DiVA: diva2:220552
Presentation
Algoritmen, B-house, Campus Valla, Linköpings universitet, Linköping (English)
Uppsok
teknik
Supervisors
Examiners
Available from: 2009-06-10 Created: 2009-06-01 Last updated: 2009-06-10Bibliographically approved

Open Access in DiVA

Two-Tone PLL for On-Chip Test In 90nm-Technology(757 kB)466 downloads
File information
File name FULLTEXT01.pdfFile size 757 kBChecksum SHA-512
f9b9198c999231b71d8d59cbf6c5f94eb919dce73585af52dada33ae60c995d5cf8704646b7195ee50d5ee857cabf59275331e06a470fde154dabcf6df184811
Type fulltextMimetype application/pdf

By organisation
Department of Electrical Engineering
Information Science

Search outside of DiVA

GoogleGoogle Scholar
Total: 466 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 733 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf