A High Speed Sigma Delta A/D-Converter for a General Purpose RF Front End in 90nm-Technology
Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
In this report a transistor-level design of a GHz Sigma-Delta analog-to-digital converter for an RF front end is proposed. The design is current driven, where the integration is done directly over two capacitances and it contains no operational amplifiers.
The clock frequency used for verification was 2.5 GHz and the output band-width was 10 MHz. The system is flexible in that the number of internal bits can be scaled easily and in this report a three-bit system yielding an SNR of 76.5 dB as well as a four-bit system yielding an SNR of 82.5 dB are analyzed.
Place, publisher, year, edition, pages
Institutionen för systemteknik , 2007. , 63 p.
ADC, A/D Converter, analog-to-digital converter, Sigma Delta
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-8706ISRN: LiTH-ISY-EX--07/4017--SEOAI: oai:DiVA.org:liu-8706DiVA: diva2:23409
2007-03-06, Algorithmen, B, Linköping, 10:15