A fully programmable Rake-receiver architecture for multi-standard baseband processors
2005 (English)In: Proceedings of the Intl. conference on Networks and Communication systems, NCS2005, 2005, 292-297 p.Conference paper (Other academic)
Programmability will be increasingly important in future multi-standard radio systems. We are presenting a fully programmable and flexible DSP platform capable of efficiently performing channel estimation and Maximum Ratio Combining (MRC) based channel equalization for a large number of wireless transmission systems in software. Our processor is based on a programmable DSP processor with SIMD-computing clusters. We also map Rake receiver kernel functions supporting a large number of commonWireless LAN and 3G standards to this microarchitecture. The use of the inherit flexibility for future standards is also discussed. Benchmarking show that with the proposed instruction set architecture, our architecture can support channel estimation, equalization and decoding of: WCDMA (FDD/TDD-modes), TD-SCDMA and the higher data rates of IEEE 802.11b (CCK) at clock frequency not exceeding 76 MHz.
Place, publisher, year, edition, pages
2005. 292-297 p.
CDMA, Rake, MRC, DSP, SDR
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-14524OAI: oai:DiVA.org:liu-14524DiVA: diva2:23637
The Intl. conference on Networks and Communication systems, NCS2005. Krabi, Thailand 2005.