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A 72.2Mbit/s Transformer-Based Power Amplifier in 65nm CMOS for 2.4GHz 802.11n WLAN
Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
Linköping University, Department of Electrical Engineering, Electronic Devices. Linköping University, The Institute of Technology.
2008 (English)In: Proceedings of 26th IEEE NORCHIP Conference, IEEE , 2008, 54-56 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes the design of a power amplifier (PA) for WLAN 802.11n fabricated in 65 nm CMOS technology. The PA utilizes 3.3 V thick-gate oxide (5.2 nm) transistors and a two-stage differential configuration with two integrated transformers for input and interstage matching. For a 72.2 Mbit/s, 64-QAM, 802.11n OFDM signal at an average and peak output power of 11.6 dBm and 19.6 dBm, respectively, the measured EVM is 3.8%. The PA meets the spectral mask up to an average output power of 17 dBm.

Place, publisher, year, edition, pages
IEEE , 2008. 54-56 p.
Keyword [en]
CMOS analogue integrated circuits, OFDM modulation, UHF power amplifiers, power transformers, quadrature amplitude modulation, wireless LAN
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-21005DOI: 10.1109/NORCHP.2008.4738281ISBN: 978-1-4244-2492-4 (print)OAI: oai:DiVA.org:liu-21005DiVA: diva2:240374
Conference
26th IEEE NORCHIP Conference, November 17–18, Tallinn, Estonia
Available from: 2009-09-28 Created: 2009-09-28 Last updated: 2010-04-15Bibliographically approved
In thesis
1. Power Amplifier Circuits in CMOS Technologies
Open this publication in new window or tab >>Power Amplifier Circuits in CMOS Technologies
2009 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

The wireless market has experienced a remarkable development and growth since the introduction of the first mobile phone systems, with a steady increase in the number of subscribers, new application areas, and higher data rates. As mobile phones and wireless connectivity have become consumer mass markets, a prime goal of the IC manufacturers is to provide low-cost solutions.

The power amplifier (PA) is a key building block in all RF transmitters. To lower the costs and allow full integration of a complete radio System-on-Chip (SoC), it is desirable to integrate the entire transceiver and the PA in a single CMOS chip. While digital circuits benefit from the technology scaling, it is becoming significantly harder to meet the stringent requirements on linearity, output power, and power efficiency of PAs at lower supply voltages. This has recently triggered extensive studies to investigate the impact of different circuit techniques, design methodologies, and design trade-offs on functionality of PAs in nanometer CMOS technologies.

This thesis addresses the potential of integrating linear and highly efficient PAs and PA architectures in nanometer CMOS technologies at GHz frequencies. In total four PAs have been designed, two linear PAs and two switched PAs. Two PAs have been designed in a 65nm CMOS technology, targeting the 802.11n WLAN standard operating in the 2.4-2.5GHz frequency band with stringent requirements on linearity. The first linear PA is a two-stage amplifier with LC-based input and interstage matching networks, and the second linear PA is a two-stage PA with transformer-based input and interstage matching networks. Both designs were evaluated for a 72.2Mbit/s, 64-QAM 802.11n OFDM signal with a PAPR of 9.1dB. Both PAs fulfilled the toughest EVM requirement of the standard at average output power levels of 9.4dBm and 11.6dBm, respectively. Matching techniques in both PAs are discussed as well.

Two Class-E PAs have been designed in 130nm CMOS and operated at low ‘digital’ supply voltages. The first PA is intended for DECT, while the second is intended for Bluetooth. At 1.5V supply voltage and 1.85GHz, the DECT PA delivered +26.4dBm of output power with a drain efficiency (DE) and poweradded efficiency (PAE) of 41% and 30%, respectively. The Bluetooth PA had an output power of +22.7dBm at 1.0V with a DE and PAE of 48% and 36%, respectively, at 2.45GHz. The Class-E amplifier stage is also suitable for employment in different linearization techniques like Polar Modulation and Outphasing, where a highly efficient Class-E PA is crucial for a successful implementation.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press, 2009. 83 p.
Series
Linköping Studies in Science and Technology. Thesis, ISSN 0280-7971 ; 1414
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-21030 (URN)LiU-TEK-LIC-2009:22 (Local ID)978-91-7393-530-2 (ISBN)LiU-TEK-LIC-2009:22 (Archive number)LiU-TEK-LIC-2009:22 (OAI)
Presentation
2009-11-04, Glashuset, Campus Valla, Linköpings universitet, Linköping, 10:15 (Swedish)
Opponent
Supervisors
Available from: 2009-09-28 Created: 2009-09-28 Last updated: 2010-04-05Bibliographically approved

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Fritzin, JonasAlvandpour, Atila

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