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Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
2005 (English)In: IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, Vol. 52, no 11, 2265-2275 p.Article in journal (Refereed) Published
Abstract [en]

The current-steering digital-to-analog converter (DAC) is the most common type of DAC for high-speed applications. Glitches present in the DAC output contribute to nonlinear distortion in the DAC transfer characteristics degrading the circuit performance. One source of glitches is asymmetry in the settling behavior when switching on and off a current source. A behavioral-level model of this nonideal behavior is derived in this work. Further, a method with low computational complexity for estimating the influence of the modeled errors in the frequency domain is developed. This method can be utilized by circuit designers to derive circuit requirements for fulfilling a given frequency-domain specification, potentially relaxing the requirements compared with a worst-case analysis. Examples of model utilization are given in terms of an analytical examination and MATLAB simulations. A good agreement between simulated and analytical results is obtained.

Place, publisher, year, edition, pages
Piscataway: IEEE , 2005. Vol. 52, no 11, 2265-2275 p.
Keyword [en]
circuit simulation, computational complexity, current-mode circuits, digital-analog conversion, frequency-domain analysis, nonlinear distortion
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:liu:diva-21848DOI: 10.1109/TCSI.2005.853404OAI: diva2:241826
Available from: 2009-10-06 Created: 2009-10-06 Last updated: 2009-10-14

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Vesterbacka, Mark
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ReferencesLink to record
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