Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO
Independent thesis Basic level (professional degree), 20 points / 30 hpStudent thesis
NXP Semiconductors (formerly Philips Semiconductors) has created a new embedded asynchronous FIFO module. It is a small and fast full-custom design with Design-for-Test (DfT) functionality. The fault detection qualities of a proposed manufacturing test for this FIFO have been analyzed by a defect-based method based on analog simulation. Resistive bridges and opens of different sizes in the bit-cell matrix and in the asynchronous control have been investigated.
The fault coverage for bridge defects in the bit-cell matrix of the initial FIFO test has been improved by inclusion of an additional data background and low-voltage testing. 100% fault coverage is reached for low resistance bridges. The fault coverage for opens has been improved by a new test procedure including waiting periods.
98.4% of the hard bridge defects in the asynchronous control slices can be detected with some modifications of the initial test.
Place, publisher, year, edition, pages
Institutionen för datavetenskap , 2007. , 68 p.
FIFO Testing, FIFO, Testing, Defect-Based Testing, Electronics
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-9942ISRN: LITH-IDA/DS-EX--07/002--SEOAI: oai:DiVA.org:liu-9942DiVA: diva2:24236
Azimane, MohamedMarinissen, Erik JanWielage, PaulWouters, ClemensLarsson, Erik