2.5 Gb/s, 72 dBΩ transimpedance amplifier in 0.35 μm CMOS
2004 (English)Conference paper (Other academic)
A differential transimpedance amplifier in a 3.3 V 0.35 μm CMOS process with an fT of 17 GHz is presented. Measurements demonstrate a transimpedance gain of 72 dBΩ and 1.4 GHz bandwidth. Eye diagrams at a data rate of 2.5 Gb/s show a dynamic range of more than 60 dB. The performance is reached with a three-stage transimpedance amplifier, utilizing differential high-speed stages and carefully chosen peaking frequencies.
Place, publisher, year, edition, pages
Macao: University of Macao , 2004. 261- p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-22653Local ID: 1940OAI: oai:DiVA.org:liu-22653DiVA: diva2:242966
The 2004 IEEJ 7th International Analog VLSI Workshop (AVLSIWS), 13th - 15th October, 2004, University of Macau, Macao SAR, China