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Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting
Dept. Computer Engineering Tallinn University of Technology.
Dept. Computer Engineering Tallinn University of Technology.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2003 (English)In: The 21st NORCHIP Conference,2003, 2003, 112-116 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes a hybrid BIST architecture for testing core-based systems together with a method for test time minimization. The approach uses test pattern broadcasting for both pseudorandom and deterministic patterns. To overcome the high complexity of the test time minimization problem we propose a fast algorithm to find an efficient combination of pseudorandom and deterministic test sets under given memory constraints. The efficiency of the approach is demonstrated by experimental results.

Place, publisher, year, edition, pages
2003. 112-116 p.
Keyword [en]
hybrid BIST, test time minimization, pseudorandom patterns, deterministic patterns, memory constraints, core-based systems
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-23323Local ID: 2753OAI: oai:DiVA.org:liu-23323DiVA: diva2:243637
Available from: 2009-10-07 Created: 2009-10-07

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http://www.ida.liu.se/labs/eslab/publications/pap/db/norchip03.pdf

Authority records BETA

Jervan, GertPeng, Zebo

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