A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling
2003 (English)In: International Test Conference ITC 2003,2003, Charlotte, NC, USA: IEEE , 2003, 1135- p.Conference paper (Refereed)
This paper presents a novel reconfigurable powerconscious core test wrapper and discusses its application to optimal power-constrained SOC (system-on-chip) test scheduling. The advantage with the proposed wrapper is that at each core it allows (1) a exible TAM (test access mechanism) bandwidths, and (2) a possibility to select the appropriate test power consumption. Our scheduling technique, an extension of a preemptive scheduling approach,produces optimal solutions in respect to test time, and selects wrapper configurations in a systematic way that implicitly minimizes the TAM routing and the wrapper logic. Experimental results show the efficiency of our approach.
Place, publisher, year, edition, pages
Charlotte, NC, USA: IEEE , 2003. 1135- p.
test access mechanisms, TAM, test scheduling, wrapper configuration, TAM routing, wrapper logic, test power consumption, preemptive scheduling
National CategoryComputer Science
IdentifiersURN: urn:nbn:se:liu:diva-23328Local ID: 2758OAI: oai:DiVA.org:liu-23328DiVA: diva2:243642