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Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2003 (English)In: Design Automation and Test in Europe DATE 2003 Conference,2003, Munich, Germany: IEEE Computer Society Press , 2003, p. 184-Conference paper, Published paper (Refereed)
Abstract [en]

We present an approach to schedulability analysis for the synthesis of multi-cluster distributed embedded systems consisting of time-triggered and event-triggered clusters, interconnected via gateways. We have also proposed a buffer size and worst case queuing delay analysis for the gateways, responsible for routing inter-cluster traffic. Optimization heuristics for the priority assignment and synthesis of bus access parameters aimed at producing a schedulable system with minimal buffer needs have been proposed. Extensive experiments and a real-life example show the efficiency of our approaches.

Place, publisher, year, edition, pages
Munich, Germany: IEEE Computer Society Press , 2003. p. 184-
Keyword [en]
multi-cluster distributed embedded systems, schedulability analysis, event-triggered, time-triggered
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:liu:diva-23340Local ID: 2772OAI: oai:DiVA.org:liu-23340DiVA, id: diva2:243654
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2018-01-13

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http://www.ida.liu.se/labs/eslab/publications/pap/db/date03.formal.pdf

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Pop, PaulEles, Petru IonPeng, Zebo

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Citation style
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  • en-GB
  • en-US
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  • nn-NB
  • sv-SE
  • Other locale
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Output format
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  • asciidoc
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