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Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
Dept. of Electronics and Computer Science University of Southampton.
Dept. of Electronics and Computer Science University of Southampton.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2002 (English)In: Design Automation and Test in Europe Conference DATE 2002,2002, Paris, France: IEEE Computer Society Press , 2002, 514- p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, we present an efficient two-step iterative synthesis approach for distributed embedded systems containing dynamic voltage scalable processing elements (DVS-PEs), based on genetic algorithms. The approach partitions, schedules, and voltage scales multi-rate specifications given as task graphs with multiple deadlines. A distinguishing feature of the proposed synthesis is the utilisation of a generalised DVS method. In contrast to previous techniques, which simply exploit available slack time, this generalised technique additionally considers the PE power profile during a refined voltage selection to further increase the energy savings. Extensive experiments are conducted to demonstrate the efficiency of the proposed approach. We report up to 43.2% higher energy reductions compared to previous DVS scheduling approaches based on constructive techniques and total energy savings of up to 82.9% for mapping and scheduling optimised DVS systems.

Place, publisher, year, edition, pages
Paris, France: IEEE Computer Society Press , 2002. 514- p.
Keyword [en]
dynamic voltage scaling, lower power, distributed embedded systems
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-23368Local ID: 2804OAI: oai:DiVA.org:liu-23368DiVA: diva2:243682
Available from: 2009-10-07 Created: 2009-10-07

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Eles, Petru Ion

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