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Test Scheduling and Scan-Chain Division Under Power Constraint
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2001 (English)In: Tenth Asian Test Symposium ATS 2001,2001, Kyoto, Japan: IEEE Computer Society Press , 2001, 259- p.Conference paper, Published paper (Refereed)
Abstract [en]

An integrated technique for test scheduling and scan-chain division under power constraints is proposed in this paper. We demonstrate that optimal test time can be achieved for systems tested by an arbitrary number of tests per core using scan-chain division and we define an algorithm for it. The design of wrappers to allow different lengths of scan-chains per core is also outlined. We investigate the practical limitations of such wrapper design and make a worst case analysis that motivates our integrated test scheduling and scan-chain division algorithm. The efficiency and usefulness of our approach have been demonstrated with an industrial design.

Place, publisher, year, edition, pages
Kyoto, Japan: IEEE Computer Society Press , 2001. 259- p.
Keyword [en]
scan-chain, test scheduling, wrapper design, testing, embedded systems
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-23372Local ID: 2809OAI: oai:DiVA.org:liu-23372DiVA: diva2:243686
Available from: 2009-10-07 Created: 2009-10-07

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http://www.ida.liu.se/labs/eslab/publications/pap/db/ATS01.pdf

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Larsson, ErikPeng, Zebo

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