Test Scheduling and Scan-Chain Division Under Power Constraint
2001 (English)In: Tenth Asian Test Symposium ATS 2001,2001, Kyoto, Japan: IEEE Computer Society Press , 2001, 259- p.Conference paper (Refereed)
An integrated technique for test scheduling and scan-chain division under power constraints is proposed in this paper. We demonstrate that optimal test time can be achieved for systems tested by an arbitrary number of tests per core using scan-chain division and we define an algorithm for it. The design of wrappers to allow different lengths of scan-chains per core is also outlined. We investigate the practical limitations of such wrapper design and make a worst case analysis that motivates our integrated test scheduling and scan-chain division algorithm. The efficiency and usefulness of our approach have been demonstrated with an industrial design.
Place, publisher, year, edition, pages
Kyoto, Japan: IEEE Computer Society Press , 2001. 259- p.
scan-chain, test scheduling, wrapper design, testing, embedded systems
National CategoryComputer Science
IdentifiersURN: urn:nbn:se:liu:diva-23372Local ID: 2809OAI: oai:DiVA.org:liu-23372DiVA: diva2:243686