Formal Coverification of Embedded Systems using Model Checking
2000 (English)In: 26th Euromicro Conference Digital Systems Design,2000, Maastricht, The Netherlands: IEEE Computer Society Press , 2000, 106-113 vol.1 p.Conference paper (Refereed)
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for hardware/software systems are needed. In this paper we introduce a computational model for embedded systems based on Petri nets, called PRES. We present an approach to coverification of both the hardware and software parts of an embedded system represented by PRES. We use symbolic model checking to prove the correctness of such systems, specifying properties in CTL and verifying whether they are satisfied. This coverification method permits to reason formally about design properties as well as timing requirements. A medical monitoring system illustrates the feasibility of our approach on practical applications.
Place, publisher, year, edition, pages
Maastricht, The Netherlands: IEEE Computer Society Press , 2000. 106-113 vol.1 p.
formal verification, PRES, petri nets, modeling, hardware software co-design
IdentifiersURN: urn:nbn:se:liu:diva-23387DOI: 10.1109/EURMIC.2000.874622Local ID: 2827ISBN: 0-7695-0780-8OAI: oai:DiVA.org:liu-23387DiVA: diva2:243701
26th Euromicro Conference, 05-07 September 2000, Maastricht, Netherlands
vol. I proceeding2009-10-072009-10-072015-01-22