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Test Infrastructure Design and Test Scheduling Optimization
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2000 (English)Other (Other (popular science, discussion, etc.))
Abstract [en]

We propose a technique for test scheduling and design of test bus infrastructure where test application time as well as test bus length and width are minimized while constraints on power consumption and test resources are considered. Our approach is suitable for repeated use in the design space exploration process due to its low computational cost. For the final design, we use simulated annealing to optimize the solution. The proposed technique is implemented and experimental results show the efficiency of our approach.

Place, publisher, year, pages
Cascais, Portugal: European Test Workshop , 2000.
Keyword [en]
test scheduiling, simulated annealing
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-23402Local ID: 2844OAI: oai:DiVA.org:liu-23402DiVA: diva2:243716
Available from: 2009-10-07 Created: 2009-10-07

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http://www.ida.liu.se/labs/eslab/publications/pap/db/ETW00.ps.gz

Authority records BETA

Larsson, ErikPeng, Zebo

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