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Comparison of graphical and sub-expression elimination methods for design of efficient multipliers
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.ORCID iD: 0000-0003-3470-3911
2004 (English)In: Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, 2004, Volume 1, IEEE , 2004, 72-76 p.Conference paper (Other academic)
Abstract [en]

Relationships are examined between two traditional strategies used to design "multiplier blocks": graphical methods and common subexpression elimination (CSE), four applications: single multipliers, multiplier blocks (several products of a single multiplicand), FIR filters and matrix multipliers are compared. A new representation shows how graphical designs can be extracted from CSE designs. Algorithms for both approaches are compared. A new graphical algorithm for FIR filter design and new results for CSE in the multiple product case are presented so comparison can be made for all applications. We conclude that for simpler problems, graphical methods are best, while CSE works better for the more complex problems

Place, publisher, year, edition, pages
IEEE , 2004. 72-76 p.
National Category
Engineering and Technology
URN: urn:nbn:se:liu:diva-23606DOI: 10.1109/ACSSC.2004.1399090Local ID: 3096ISBN: 0-7803-8622-1OAI: diva2:243921
The Thirty-Eighth Asilomar Conference on Signals, Systems and Computers, Novemb er 7-10, Pacific Grove, California, USA
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2015-03-11Bibliographically approved

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Gustafsson, Oscar
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Electronics SystemThe Institute of Technology
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