Power Estimation for Ripple-Carry Adders with Correlated Input Data
2004 (English)In: International Workshop on Power and Timing Modeling, Optimization and Simulation,2004, 2004, 662-674 p.Conference paper (Other academic)
In this work modelling of the power consumption for ripple-carry adders implemented in CMOS is considered. Based on the switching activity of each input bit, two switching models, one full and one simplified, are derived. These switching models can be used to derive the average energy consumed for one computation. This work extends previous results by introducing a data dependent power model, i.e., correlated input data is considered. Examples show that the switching model is accurate, while there are some differences in the power consumption. This is due to the fact that not all switching in the ripple-carry adder is rail-to-rail (full swing) in the actual implementation
Place, publisher, year, edition, pages
2004. 662-674 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-23607Local ID: 3097OAI: oai:DiVA.org:liu-23607DiVA: diva2:243922
14th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2004, Santorini, Greece, September 15-17, 2004