Multiplier blocks using carry-save adders
2004 (English)In: Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, Volume 2, 2004, 473-476 p.Conference paper (Refereed)
Multiplier blocks have been shown to require a small number of adders for multiplying one data sample with multiple, constant, coefficients. The previously proposed multiplier block algorithms have been using carry-propagation adders. However, for high-speed applications carry-save adders are a better choice. Although it is possible to map carry-save adders to carry-propagation adders, it is shown that this mapping is inconsistent in the number of carry-save adders required for a given number of carry-propagation adders for multiplier blocks. Therefore, a multiplier block algorithm for carry-save adders is proposed. It is shown that the proposed algorithm is producing multiplier blocks with consistently fewer carry-save adders compared with starting with a carry-propagation multiplier block and mapping it to carry-save adders. Further, it is shown that the proposed algorithm produces multiplier blocks with fewer carry-save adders than algorithms based on subexpression sharing
Place, publisher, year, edition, pages
2004. 473-476 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-23661DOI: 10.1109/ISCAS.2004.1329311Local ID: 3155ISBN: 0-7803-8251-XOAI: oai:DiVA.org:liu-23661DiVA: diva2:243976
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04, May 23-26, Vancouver, Canada