Pipelining of digit-serial processing elements in recursive digital filters
2004 (English)In: Proc. 6th Nordic Signal Processing Symp., NORSIG'04, 2004, , 129-132 p.129-132 p.Conference paper (Refereed)
In this paper, performance trade-offs between throughput, and energy consumption, in implementation of recursive digital filters are presented. Digit-serial arithmetic with different degree of pipelining are used in the implementions. As a demonstration object, a bireciprocal third-order lattice wave digital filter is used. Simulations with HSPICE show that a maximum throughput is obtained using pipelined processing elements with a digit-size equal to the fractional bits in the filter coefficient. The use of non-pipelined processing elements yields minimum energy consumption. A trade-off between throughput and energy consumption can be made by pipelining only some of the processing elements.
Place, publisher, year, edition, pages
2004. , 129-132 p.129-132 p.
pipelining, digital filters
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-23713Local ID: 3216ISBN: 951-22-7065-XOAI: oai:DiVA.org:liu-23713DiVA: diva2:244028