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Pipelining of digit-serial processing elements in recursive digital filters
ISY .
Linköping University, Department of Electrical Engineering, Electronics System.
Univ. Kalmar.
2004 (English)In: Proc. 6th Nordic Signal Processing Symp., NORSIG'04, 2004, , 129-132 p.129-132 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, performance trade-offs between throughput, and energy consumption, in implementation of recursive digital filters are presented. Digit-serial arithmetic with different degree of pipelining are used in the implementions. As a demonstration object, a bireciprocal third-order lattice wave digital filter is used. Simulations with HSPICE show that a maximum throughput is obtained using pipelined processing elements with a digit-size equal to the fractional bits in the filter coefficient. The use of non-pipelined processing elements yields minimum energy consumption. A trade-off between throughput and energy consumption can be made by pipelining only some of the processing elements.

Place, publisher, year, edition, pages
2004. , 129-132 p.129-132 p.
Keyword [en]
pipelining, digital filters
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-23713Local ID: 3216ISBN: 951-22-7065-X (print)OAI: oai:DiVA.org:liu-23713DiVA: diva2:244028
Available from: 2009-10-07 Created: 2009-10-07 Last updated: 2009-10-14

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Vesterbacka, Mark

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
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  • Other style
More styles
Language
  • de-DE
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  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf