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A 3Gb/s/wire, 5mm Long, Low Latency, Global On-Chip Bus in 0.18µm CMOS.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
2005 (English)In: SSoCC 2005,2005, 2005Conference paper, Published paper (Other academic)
Place, publisher, year, edition, pages
2005.
Keyword [en]
Interconnect, global interconnect, interconnect delay, on-chip bus, upper-level metal
National Category
Engineering and Technology
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URN: urn:nbn:se:liu:diva-28438Local ID: 13578OAI: oai:DiVA.org:liu-28438DiVA: diva2:249247
Note
2 p.Available from: 2009-10-09 Created: 2009-10-09

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Caputa, PeterSvensson, Christer

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